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研究生: 劉嘉峻
Jia-jyun Liou
論文名稱: 雙相交錯式無橋降壓型功率因數修正器之研製
Design and Implementation of a Two-phase Interleaved Bridgeless Buck Power Factor Corrector
指導教授: 羅有綱
Yu-Kang Lo
邱煌仁
Huang-Jen Chiu
口試委員: 林忠義
none
馬紅波
none
學位類別: 碩士
Master
系所名稱: 電資學院 - 電子工程系
Department of Electronic and Computer Engineering
論文出版年: 2013
畢業學年度: 101
語文別: 中文
論文頁數: 95
中文關鍵詞: 功率因數修正無橋降壓型轉換器交錯式無橋降壓型轉換器箝位電流功能
外文關鍵詞: power factor correction, bridgeless buck converter, interleaved bridgeless buck converter, clamp-current feature
相關次數: 點閱:334下載:18
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  • 本論文主要目的係研製一具有高功率因數、低諧波、高效率及高功率密度之雙相交錯式無橋降壓型功率因數修正器。雙相交錯式控制策略不只保有傳統單相脈波寬度調變(PWM)降壓型轉換器的優點,且在高輸出功率下更可改善功率元件高耐流、儲能電感體積過大、輸出電容過大及EMI濾波器體積等問題。本論文實際製作一700W之無橋降壓型功率因數修正器與一700W之雙相交錯式無橋降壓型功率因數修正器,以驗證論文中所提之分析與設計考量是否合理。實作電路之控制IC使用德州儀器公司所生產的UC3842,採用具箝位功能之電流控制模式,不同於一般升壓型架構,降壓型功率因數修正器的輸出電解電容可以選用較低值,在後級DC-DC轉換器設計上也具有更多選擇性。經測量結果證明,雙相交錯式架構確實可以減少電流漣波,適合於大功率應用場合。


    This thesis is focused on the design and implementation of a two-phase interleaved bridgeless buck power factor corrector (PFC) to achieve a high power factor, low input current harmonics, high efficiency and high power density. A two-phase interleaved bridgeless buck PFC features the advantages of a conventional single-phase PWM buck converter. In addition, the voltage and current ratings of the power switches, and the volumes of the inductors, output capacitors and EMI filters can be reduced. A 700-W bridgeless buck PFC and a 700-W two-phase interleaved bridgeless buck PFC are implemented in the laboratory. Experiments are conducted and satisfactory results are measured to confirm the effectiveness and the feasibility of the theoretical analysis and design considerations. The UC3842 is used as the control IC with a clamp-current feature for the PFC. Compared with other general boost converters, a buck converter requires smaller electrolyte capacitors at the output. It contributes to have more choices in the DC-DC converter design. Thus the two-phase interleaved PFC is especially suitable for serving as a pre-regulator in the high-power applications.

    目 錄 摘 要 i Abstract ii 誌 謝 iii 目 錄 v 圖索引 vii 表索引 xi 第一章 緒論 1 1.1研究背景及動機 1 1.2內容大綱 3 第二章 降壓型功率因數修正器操作模式 4 2.1功率因數與總諧波失真之定義 4 2.2功率因數修正器之操作與控制模式 7 2.2.1電壓隨耦控制模式 7 2.2.2乘法器控制模式 8 2.3降壓型功率因數修正器操作模式 11 2.3.1箝位式電流模式控制法 12 2.3.2 CCB PFC的分析 13 2.3.3斜率補償設計 15 第三章 無橋降壓型功率因數修正器之架構與原理 17 3.1傳統降壓型功率因數修正器之架構與動作原理 17 3.2無橋降壓型功率因數修正電路 22 3.3傳統降壓型功因修正器與無橋降壓型功因修正器之比較 27 第四章 交錯式無橋降壓型功因修正器架構與分析 34 4.1多相式降壓型轉換器介紹 34 4.2雙相交錯式無橋降壓型轉換器電路分析 36 4.3雙相交錯式無橋降壓型轉換器動作時序分析 38 4.4單相式與交錯式無橋降壓型功因修正器之比較 43 第五章 電路控制模式與參數設計 51 5.1交錯式無橋降壓型PFC控制IC介紹 51 5.1.1 UC3842 IC內部方塊圖與各接腳介紹 51 5.1.2 UC3842 IC特性 52 5.2交錯式電壓模式控制分流技術 55 5.3設計實例與分析 56 第六章 實驗數據與波形 62 6.1無橋降壓型功率因數修正器之實驗數據與波形 62 6.2交錯式無橋降壓型功率因數修正器之實驗數據與波形 68 6.3無橋降壓型與雙相交錯式無橋降壓型功率因數修正器之實驗結果比較 80 第七章 結論與未來展望 90 7.1結論 90 7.2未來研究方向 91 參考文獻 93

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