在基於互補式金屬氧化物半導體(CMOS)電流模式去實現臨界值邏輯閘(TLG)時，使用有理權重已被證實比不含有理權重的傳統臨界值邏輯閘更具有成本效益。現今存在用於識別具有有理權重的臨界值邏輯閘是採用整數線性規劃(ILP)的方法，使用整數線性規劃的方法可能會面臨到效率的問題，特別是在處理輸入數量較多的布林函數時會發生。因此，本篇論文提出了一種啟發式方法來識別有理權重臨界值邏輯閘。我們的觀察顯示，整數線性規劃的形式包含與有理權重相關的冗餘變數，這可能會影響到整數線性規劃找到結果的效率。此外，我們也識別出有理權重臨界值邏輯閘可以由傳統臨界值邏輯閘轉換而來。因此，我們提出的方法會專注於識別一個可以轉換為具有較低實現成本的有理權重臨界值邏輯閘的傳統臨界值邏輯閘。為了評估我們方法的有效性，我們使用了一系列包含4到15個輸入的臨界值邏輯閘進行實驗。結果顯示，與基於整數線性規劃的方法相比，我們的方法在提高效率的同時，依然能夠保持競爭力的品質。除了降低實現成本，平均比例達96.25％之外，並且只需要1.76％的CPU時間即可完成識別。

The utilization of rational weights in CMOS-based current mode implementation of threshold logic gates (TLGs) has proven to be more cost-effective than conventional TLGs without rational weights. However, the existing method for identifying rational-weight TLGs using integer linear programming (ILP) may suffer from inefficiency, especially for Boolean functions with a large number of inputs. In this paper, we propose a heuristic approach for rational-weight TLG identification. Our observation reveals that the ILP formulation involves redundant variables associated with rational weights, which can impact the efficiency of ILP solutions. Additionally, we recognize that a rational-weight TLG can be transformed from a conventional TLG. Hence, our proposed method focuses on identifying a conventional TLG that can be transformed into a rational-weight TLG with a lower implementation cost. To evaluate the effectiveness of our approach, we conducted experiments using a range of TLGs with 4 ∼ 15 inputs. The results demonstrate that our method offers competitive quality while significantly improving efficiency compared to the ILP-based method. It reduces the implementation cost with an average ratio of 96.25%, while requiring only 1.76% of CPU time.

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