在我們實驗室之前的論文“浮動累加器架構”（Floating Accumulator architecture）中，我們製作了一種新式的暫存器架構。結合了累加器特色的浮動累加器架構，可以在不增加指令長度的狀況下，有效地使用加倍了的暫存器。

在之前的論文中，提到了我們將這樣的構想，以LLVM開發，將它實作在針對ARM的平台的backend上。同時修改了組譯器與模擬器，使他們能夠配合組譯及運行浮動累加暫存器的架構的格式。

而在這篇論文中，我們則是將這樣的架構，實作在了由ARM延伸出來的子架構，Thumb的架構上。我們實作了配合Thumb的浮動累加器架構的Simplescalar使之運行，並更改了部分的組譯器，使他能夠以最簡單的方式製造出浮動累加器架構的Thumb指令集。

In our previous paper of our lab " Floating Accumulator architecture " , we make a new register architecture which combines the accumulator characteristics, and can be used without increasing the length of the instruction status, effectively doubling the number of registers.

In the previous paper, we will mention this idea to LLVM development, it would implement the backend for the ARM platform. Also we modified the assembler and simulator, so that they can assemble and run with floating accumulate register architecture format.

In this paper, we implement in an extension of the Thumb architecture , the sub-architecture of ARM architecture with FAA architecture. We implement with the floating accumulator Thumb architecture on Simplescalar and make it work. Also we change the assembler part. Let it create the floating accumulator Thumb instruction set .

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