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研究生: 吳俊諺
Chun-Yen Wu
論文名稱: 以FPGA為基礎的六相永磁馬達功率硬體模擬器研製
Development of FPGA-based Power Emulators for Six-phase Permanent Magnet Motor
指導教授: 黃仲欽
Jonq-Chin Hwang
口試委員: 劉傳聖
Chuan-Sheng Liu
林長華
Chang-Hua Lin
高瑋澤
Wei-Tse Kao
學位類別: 碩士
Master
系所名稱: 電資學院 - 電機工程系
Department of Electrical Engineering
論文出版年: 2023
畢業學年度: 111
語文別: 中文
論文頁數: 88
中文關鍵詞: 現場可程式化邏輯閘陣列六相永磁式馬達永磁式馬達驅動器信號硬體模擬器功率硬體模擬器
外文關鍵詞: Field-Programmable Gate Array, six-phase permanent magnet motor, permanent magnet motor driver, signal hardware simulator, power hardware simulator
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  • 本文旨在開發以現場可程式化邏輯閘陣列(FPGA)為基礎的六相永磁馬達功率硬體模擬器製作,用以提供各種不同參數的永磁式馬達驅動器測試。使用Simulink離線模擬以驗證模式,再採用FPGA及硬體描述語言,以完成即時六相永磁馬達的信號硬體模擬器及功率硬體模擬器製作。在信號硬體模擬器方面,建立六相永磁馬達模式及即時模擬程式,其整個運算週期為 ,該模型模擬馬達的即時響應,並透過數位-類比轉換器提供轉速及電流信號供六相永磁馬達驅動器控制使用,以驗證待測驅動控制系統。在功率硬體模擬器,將信號硬體模擬器與六相換流器結合,使用電流預測控制策略及電壓空間向量脈波寬度調變控制,回授耦合電感電流至待測驅動系統,使功率模擬器性能符合實際馬達測試。本文的功率硬體模擬器的核心為FPGA,使用硬體描述語言(Verilog)撰寫六相永磁馬達模式及六相換流器電流控制,馬達模型具有機械轉矩設定,以供待測六相馬達驅動器測試使用。
    在信號硬體模擬器與實體馬達驅動器實測方面,轉速命令為2400 rpm,負載轉矩4 N-m的條件實測實體馬達驅動器,a相及x相電流諧波失真率分別為6.74%及6.92%,信號硬體模擬器的a相及x相電流諧波失真率分別為3.61%及3.74%。六相永磁馬達功率硬體模擬器與六相永磁馬達信號硬體模擬器方面實測,在轉速命令600 rpm,負載轉矩2 N-m的條件,六相功率硬體模擬器的abc組與xyz組相電流峰值為17.52 A及16.81A,諧波失真率為9.23%及9.01%,六相信號硬體模擬器的實測結果abc組與xyz組相電流峰值為16.64 A及16.75A,諧波失真率為7.04%及6.98%,其結果相接近,由此可知本文的信號及功率硬體模擬器具可行性。


    This thesis aims to develop a power hardware simulator for a six-phase permanent magnet motor based on a Field-Programmable Gate Array (FPGA). The simulator facilitates testing of various parameters for the permanent magnet motor driver. The process involves offline simulation using Simulink to validate the model, followed by real-time simulation using FPGA and hardware description language to create both a signal hardware simulator and a power hardware simulator for the six-phase permanent magnet motor. In the signal hardware simulator, a real-time program for the six-phase permanent magnet motor is established, with the entire operating cycle being 2 s. This model simulates the motor's real-time response and provides speed and current signals to the six-phase permanent magnet motor driver through digital-analog converters, thereby verifying the test drive control system. In the power hardware simulator, the signal hardware simulator is combined with a six-phase inverter. It utilizes current predictive control strategies and voltage space vector pulse width modulation control. Feedback-coupled inductance current is fed back to the test drive system, ensuring that the power simulator's performance aligns with actual motor testing. The core of this power hardware simulator is the FPGA, with the six-phase permanent magnet motor model and the six-phase inverter current control written in Hardware Description Language (Verilog). The motor model includes mechanical torque settings for testing the target six-phase motor drive.
    In the comparison between the signal hardware simulator and physical motor driver, under the condition of a speed command of 2400 rpm and a load torque of 4 N-m, the harmonic distortion rates of phase a and x in the physical motor driver are 6.74% and 6.92%, respectively, while those of the signal hardware simulator are 3.61% and 3.74%, respectively. As for the six-phase permanent magnet motor power hardware simulator and signal hardware simulator, under the condition of a speed command of 600 rpm and a load torque of 2 N-m, the measured peak currents for abc and xyz phases in the power hardware simulator are 17.52 A and 16.81 A, respectively, with harmonic distortion rates of 9.23% and 9.01%, and for the signal hardware simulator, the measured peak currents for abc and xyz phases are 16.64 A and 16.75 A, respectively, with harmonic distortion rates of 7.04% and 6.98%. The results are in close agreement, demonstrating the feasibility of the signal and power hardware simulators developed in this study.

    摘要 I Abstract II 目錄 IV 誌謝 VII 圖表索引 VIII 符號索引 XII 第一章  緒論 1 1-1 動機及目的 1 1-2 文獻探討 2 1-2-1 功率硬體模擬器方面 2 1-2-2 現場可程式化邏輯閘陣列(FPGA)方面 2 1-2-3 六相永磁式馬達方面 2 1-3 系統架構及特色 3 1-4 本文大綱 5 第二章  六相永磁馬達模型及模擬 6 2-1 前言 6 2-2 六相永磁馬達模式 6 2-2-1 六相永磁馬達的連續域模式 6 2-2-2 六相永磁馬達的離散化模式 12 2-3 六相永磁馬達信號硬體模擬器的Simulink模擬結果 15 2-4 結語 18 第三章  六相永磁馬達功率硬體模擬器控制及模擬 19 3-1 前言 19 3-2 六相換流器的電力電路及模式 19 3-3 六相換流器的電流控制策略 22 3-4 六相永磁馬達功率硬體模擬器的Simulink模擬結果 26 3-4-1 六相換流器的Simulink模擬 28 3-4-2 六相永磁馬達功率硬體模擬器的Simulink模擬 30 3-5 結語 32 第四章  信號及功率硬體模擬器的實體製作 33 4-1 前言 33 4-2 硬體電路架構 33 4-2-1 FPGA應用介面 33 4-2-2 數位-類比轉換器(DAC) 35 4-2-3 類比-數位轉換器(ADC) 36 4-3 信號硬體模擬器的規劃 36 4-4 功率硬體模擬器的規劃 40 4-5 FPGA資源配置 44 4-6 結語 45 第五章 實測結果 46 5-1 前言 46 5-2 六相永磁馬達的信號硬體模擬器的實測 46 5-3 六相永磁馬達的功率硬體模擬器的實測 52 5-4 結語 57 第六章 結論及建議 58 6-1 結論 58 6-2 建議 59 參考文獻 60 附錄A 實體的六相永磁馬達驅動器 65 A-1 轉速閉迴路控制策略 65 A-2 電流閉迴路控制策略 67

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