研究生: |
劉家維 Chia-Wei Liu |
---|---|
論文名稱: |
針對TLC快閃記憶體之動態霍夫曼編碼方法 A Dynamic Huffman Coding Method for TLC NAND Flash Memory |
指導教授: |
吳晋賢
Chin-Hsien Wu |
口試委員: |
謝仁偉
Jen-Wei Hsieh 陳雅淑 Ya-Shu Chen 林淵翔 Yuan-Hsiang Lin 吳晋賢 Chin-Hsien Wu |
學位類別: |
碩士 Master |
系所名稱: |
電資學院 - 電子工程系 Department of Electronic and Computer Engineering |
論文出版年: | 2019 |
畢業學年度: | 107 |
語文別: | 中文 |
論文頁數: | 54 |
中文關鍵詞: | TLC快閃記憶體 、可靠度 、位元錯誤率 、霍夫曼編碼 |
外文關鍵詞: | TLC NAND Flash Memory, Reliability, Bit-Error-Rate, Huffman Coding |
相關次數: | 點閱:266 下載:0 |
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隨著科技的發展,NAND Flash Memory已經逐漸取代傳統硬碟(Hard Disk Drive, HDD),成為目前主流的儲存設備。NAND Flash Memory具有體積小、低功耗、讀寫速度快、高抗震性等優點,且隨著製程的進步,NAND Flash Memory也已經從容量較小的SLC(Single-Level Cell)、MLC(Multi-Level Cell)發展至容量較大的TLC(Triple-Level Cell)甚至是QLC(Quad-Level Cell)。儘管NAND Flash Memory有許多優勢,但它也存在著難以被克服的物理限制,比方說無法進行覆寫資料(Overwrite)的操作、擁有擦除次數(P/E Cycle)的限制等,而高容量的TLC NAND Flash Memory更存在著可靠度(Reliability)低落與壽命(Life Time)較短的問題。因此,本文將提出一種動態霍夫曼編碼的方法,使其應用在NAND Flash Memory的寫入(Write)操作上。動態霍夫曼編碼會為寫入資料選擇適合的儲存模式,並改變NAND Flash Memory中儲存狀態的分佈(VTH Distribution),以降低儲存資料時的位元錯誤率,進而提升整體的可靠度。
Recently, NAND flash memory has gradually replaced the traditional Hard-Disk Drives and become the most mainstream storage device. NAND flash memory has many advantages such as non-volatile features, small size, low-power consumption, fast-access speed, and shock resistance, etc. With the advance of the process, NAND flash memory has evolved from single-level cell (SLC) and multi-level cell (MLC) into triple-level cell (TLC) or even quad-level cell (QLC). Although NAND flash memory has many advantages, it also has many physical problems such as the characteristic of erase-before-write, the limitation of P/E Cycles, etc. Moreover, TLC NAND flash memory has the problems of low reliability and short lifetime. Thus, we propose a dynamic Huffman coding method, which can apply to the write operation of NAND flash memory. Our method can select a suitable type of Huffman coding for different kinds of data dynamically and improve the VTH distribution of NAND flash memory to reduce the bit-error-rate and improve the reliability of NAND flash memory.
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