在本論文中，我們以四層印刷電路板作為研究的結構，探討訊號藉由導通孔穿層所引發的問題，並且使用傳統的雜訊抑制結構來解決這些問題，以及提出新的結構來改良傳統的雜訊抑制結構。
我們發現穿層導通孔將面臨兩個問題：第一為當訊號線換層時，會造成訊號線參考平面改變，但是由於電源層與地層不相接，使得電流的回流路徑不連續，因而破壞訊號的穿透量；第二為當電流流經導通孔時，會藉由導通孔散出，並在電源層與地層所形成的腔體內共振，進而加劇近端串擾與遠端串擾。
為了降低近端與遠端的串擾雜訊，我們模擬並分析傳統的雜訊抑制結構，從頻域結果可得知，使用連接導孔隔絕結構，可以抑制低頻的串擾雜訊，在頻率5.55 GHz以前的準位相當低，約於-40 dB的準位；另外，使用局部週期性能隙結構，也可以有效抑制寬頻的串擾雜訊，約於-40 dB的準位，涵蓋0.45 GHz到10 GHz的頻率範圍，但是，只有使用連接導孔隔絕結構，可以有效地改善穿透係數的頻率響應。從能量損耗的結果可得知，只有使用連接導孔隔絕結構，可以抑制低頻的輻射能量，在頻率6 GHz以前的輻射能量，比參考板的輻射能量來得低，但隨著頻率的增加，輻射能量變得與參考板相當，最大輻射量約57.5%。雖然使用局部週期性能隙結構與使用連接導孔隔絕結構，可以有效地抑制近端與遠端的串擾雜訊，但是使用局部週期性能隙結構需要在整片電源層蝕刻槽線，使用連接導孔隔絕結構需要採用兩片地層，兩者所使用的抑制結構佔的面積都相當大。
為了縮小傳統雜訊抑制結構的面積，我們提出C-slot穿層電路板結構，來抑制導通孔處所產生的串擾雜訊，並且補償C-slot的回流路徑，來提升訊號的穿透量，由頻域結果可得知，改善回流路徑之雙層C-slot穿層電路板結構，可以得到良好的雜訊抑制效果，除4.25 GHz處外，從1.1 GHz到10 GHz的近端與遠端串擾約從
-20 dB降至-40 dB以下，並且穿透係數的頻率響應也可以獲得改善。從能量損耗的結果可得知，改善回流路徑之雙層C-slot結構，能夠使輻射量降低，最大輻射量約45.5%，且除了在頻率為4.2 GHz以外，從0.05 GHz到8.4 GHz輻射量可以維持在20%以下。由以上的結果我們可知，使用改善回流路徑之C-slot結構，除了可以有效地抑制近端與遠端的串擾雜訊，還可以改善穿透係數的頻率響應，並且其所使用的面積相當小，大大地縮減傳統的雜訊抑制結構所佔的面積。

In this thesis, the four-layered printed circuit board is utilized to investigate the problems caused by the signal passing through the via hole. The traditional noise suppression structures are adopted to overcome these problems. Furthermore, new noise suppression structures are proposed to reduce the area occupied by the traditional noise suppression structures.
The signal will give rise two serious problems when it passes through the via hole of the four-layered printed circuit board. First of all, the transmission coefficient of the signal will be degraded when the signal passes through the via hole since the return current of the signal will be interrupted due to the disconnection of the power and ground plane. Secondly, The near-end and far-end interferences will be exacerbated when the signal passes through the via hole since the parallel plate wave will be induced in the cavity formed by the power and ground plane.
In order to reduce the near-end and far-end interferences, some traditional noise suppression structures are utilized. As can be learned from the frequency responses of the S parameters, the noise suppression structure using the isolation via hole can suppress the low frequency interference. From 0.05 GHz to 5.55 GHz, the level of the interference is below -40 dB, which is very small. Besides, the noise suppression structure using the locally-periodic energy bandgap can effectively suppress the interference over a broad bandwidth. From 0.45 GHz to 10 GHz, the level of the interference is below -40 dB. However, only the noise suppression structure using the isolation via hole can improve the performance of the transmission coefficient. As can be learned from the frequency responses of the power loss, only the noise suppression structure using the isolation via hole can reduce the low frequency power loss. As compared with the power loss of the conventional four-layered printed circuit board, the power loss is much lower from 0.05 GHz to 6 GHz. However, as the frequency increases over 6 GHz, the power loss will be 57.5%, which is comparable to the power loss of the conventional four-layered printed circuit board. Although the noise suppression structure using the isolation via hole and the noise suppression structure using the locally-periodic energy bandgap can both effectively suppress the near-end and far-end interference, the noise suppression structure using the isolation via hole consumes two ground layers while the noise suppression structure using the locally-periodic energy bandgap needs the whole ground layer to be etched with slots. Both of them occupy a large area in the four-layered printed circuit board, which in turn increases the cost.
In order to reduce the area of the traditional noise suppression structure, the noise suppression structure using the C-slot is proposed. In order to further improve the performance of the transmission coefficient, the return current compensation method is adopted. As can be learned from the frequency response of the S parameters, the noise suppression structure using the C-slot with return current compensation can effectively suppress the interference. Except at the frequency of 4.25 GHz, the levels of the near-end and far-end interferences are below -40 dB from 1.1 GHz to 10 GHz. Besides, the performance of the transmission coefficient is improved. As can be learned from the frequency response of the power loss, the noise suppression structure using the C-slot with return current compensation can greatly reduce the power loss. From 0.05 GHz to 8.4 GHz, the power loss are below 20% except that the power loss will have a somewhat large value of 45.5% at 4.2 GHz. In conclusion, the noise suppression structure using the C-slot with return current compensation can effectively reduce the near-end and far-end interference, improve the transmission coefficient, and reduce the area. Especially, the area reduction will save cost, which would not be accomplished by the traditional noise suppression structures.

[1] J.N. Hwang and T.L. Wu, “Coupling of the Ground Bounce Noise to the Signal trace with Via Transition in Partitioned Power Bus of PCB”, IEEE International Symposium on Electromagnetic Compatibility, vol. 2, pp.733-736, Aug. 2002.
[2] F. de Paulis, Y.J. Zhang, and J. Fan, “Signal/power Integrity Analysis for Multilayer Printed Circuit Boards Using Cascaded S-Parameters”, IEEE Transactions on Electromagnetic Compatibility, vol. 52, no. 4, pp. 1008-1018, Nov. 2010.
[3] K.W. Li, K.B. Wu, and R.B. Wu, “Optimal Decoupling Capacitors Design for Suppressing Edge Radiation of Power/Ground planes”, IEEE 20th Conference on Electrical Performance of Electronic Packaging and Systems, pp. 283-286, Oct. 2011.
[4] J. Li, J. Mao and M. Tang, “Mushroom-Type Ground Plane Structure for Wideband SSN Suppression in High-Speed Circuits”, IEEE Microwave and Wireless Components Letters, vol. 21, no. 12, pp. 646-648, Dec. 2011.
[5] A.E. Engin, C. Fergusson, Q.F. Su, and J. Aguirre, “Power Archipelago for Filtering Power Plane Noise”, IEEE Transactions on Electromagnetic Compatibility, vol. 58, no. 5, pp. 1602-1608, Oct. 2016.
[6] M.M. Bait-Suwailam and O.M. Ramahi, "Ultrawideband Mitigation of Simultaneous Switching Noise and EMI Reduction in High-Speed PCBs Using Complementary Split-Ring Resonators", IEEE Transactions on Electromagnetic Compatibility, vol. 54, no. 2, pp 389-396, Apr. 2012.
[7] T.H. Chung, H.D. Kang, T.L. Song, and J.G. Yook, ” Power Noise Suppression using Dual Spiral Resonator with Modified Ground Clearance for High-Speed PCB”, IEEE Electrical Design of Advanced Packaging and Systems Symposium, 12-14 Dec. 2011.
[8] T.L. Wu, Y.H. Lin, T.K. Wang, C.C. Wang, and S.T. Chen, “Electromagnetic Bandgap Power/Ground Planes for Wideband Suppression of Ground Bounce Noise and Radiated Emission in High-Speed Circuits”, IEEE Transactions on Microwave Theory and Techniques, vol. 53, no. 9, pp.2935-3942, Sept. 2005.
[9] J.H. Kwon, D.U. Sim, S.I. Kwak, and J.G. Yook, “Novel Electromagnetic Bandgap Array Structure on Power Distribution Network for Suppressing Simultaneous Switching Noise and Minimizing Effects on High-Speed Signals”, IEEE Transactions on Electromagnetic Compatibility, vol. 52, no. 2, pp. 365-372, May 2010.
[10] L. Li, Q. Chen, Q. Yuan, and K. Sawaya, “Ultrawideband Suppression of Ground Bounce Noise in Multilayer PCB Using Locally Embedded Planar Electromagnetic Band-Gap Structures”, IEEE Antennas and Wireless Propagation Letters, vol. 8, pp.740-743, 2009.

[11] M.S. Zhang, H.Z. Tan, and J.F. Mao, “A Novel Layer Stack-Up With Free Cavity Resonance for High-Performance Power Noise Suppression”, IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 4, no. 12, pp.1973-1980, Dec. 2014.
[12] M.S. Zhang, J.F. Mao, and Y.L. Long, “Power Noise Suppression Using Power-and-Ground Via Pairs in Multilayered Printed Circuit Boards”, IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 1, no. 3, pp.374-385, Mar. 2011.
[13] A.E. Engin, I. Ndip, K.D. Lang, and G. Aguirre,“ Nonoverlapping Power/Ground Planes for Suppression of Power Plane Noise”, IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 8, no. 1, pp.50-56, Jan. 2018.
[14] Z.S. Yan, “Reduction of Common-Mode and Differential-Mode Noises for Multilayers Differential Transmission Line” master’s degree thesis.
[15] R. Marques, F. Mesa, J. Martel, and F. Medina, “Comparative analysis of edge and broadside-coupled split ring resonators for metamaterial design, theory and experiments”, IEEE Transaction on Antennas and Propagation, vol. 51, no. 10, pp.2572-2581, Oct. 2003.