本論文針對感應伺服馬達向量控制，利用Cell-Based IC Design Flow實現感應馬達向量控制晶片。首先建立感應馬達向量控制演算法則，經過標么化處理，可應用在不同規格的系統上；接著使用MATLAB Simulink將感應馬達向量控制數學方塊圖以浮點運算方式設計出其模型，然後利用操作點設計定點運算之Q值，分別設計出32位元與16位元之定點運算規格的感應馬達向量控制數位模型。
設計出感應馬達向量控制數位模型後，接著利用硬體描述語言Verilog HDL撰寫感應馬達向量控制晶片模組，從基本的運算元件開始設計其模組，如乘法器、積分器與除法器，之後設計較複雜的模組，如PI控制器、滑差估測器、電壓解耦合等模組，並規劃整個晶片系統之IO界面與暫存器，最後建構出完整感應馬達向量控制晶片模組，得到合成後的RTL(Register Transfer Level)電路圖。
將MATLAB Simulink設計的模型與Verilog HDL設計的模組做模擬與比較，驗證兩者的設計方法正確之後，開始進行晶片設計流程，從電路合成到佈局與繞線，成功地製作出32位元和16位元之感應馬達向量控制晶片佈局圖。

This thesis studies the design of a control chip for realizing the vector control laws of an induction servo motor using cell-based IC design flow. The induction motor vector control laws are first per unitized so as to be applicable to various motor ratings. Then MATLAB/Simulink programs are developed to establish the vector controlled induction motor models in floating-point formats. To design both 32-bit and 16-bit models in fixed-point formats, the Q values are determined by predetermined motor operating points.
The hardware description language Verilog is used to code the digitalized vector-control laws and the motor model. The design starts from the basic computation units such as multiplier, integrator and divider. It then follows by more complicated modules such as the PI controllers, slip estimators, voltage decouplers, and the I/O interface and registers for the desired control chip. The complete vector-controlled chip modules are ultimately integrated and the RTL (register transfer level) circuit diagram is synthesized.
Both the MATLAB/Simulink and Verilog models are simulated and compared. The simulation results confirm the accuracy of the proposed approach. The final step is to complete the chip design flow and the thesis successfully complete routing and layout for both the 32-bit and 16-bit vector-controlled chips.

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