四相位壓控振盪器與使用克萊普架構的注入鎖定除頻器之研製

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研究生：	邱耀庭 Yao-Ting Chiu
論文名稱：	四相位壓控振盪器與使用克萊普架構的注入鎖定除頻器之研製 Implementation of CMOS Quadrature VCO and Clapp Injection-Locked Frequency Divider
指導教授：	張勝良 Sheng-Lyang Jang 徐敬文 Ching-Wen Hsue
口試委員:	黃進芳 Jhin-Fang Haung 馮武雄 W. S. Feng
學位類別：	碩士 Master
系所名稱：	電資學院 - 電子工程系 Department of Electronic and Computer Engineering
論文出版年：	2011
畢業學年度：	99
語文別：	英文
論文頁數：	96
中文關鍵詞：	四相位壓控振盪器
外文關鍵詞：	QVCO
相關次數：	點閱：195 下載：1
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在無線通訊系統中，頻率合成器是用來做訊號頻率的升降之用。其中，壓控振盪器與除頻器更是頻率合成器電路裡的核心電路之ㄧ。對壓控振盪器而言，必須提供低相位雜訊的輸出，以避免相鄰雜訊訊號經由混波轉換產生干擾。而壓控振盪器的輸出會經由除頻器降頻至與參考訊號相同的等級，與相位頻率偵測器做比較以校正壓控振盪器的輸出，故除頻器需要有高頻操作的能力。由於應用於無線通訊系統中，壓控振盪器與除頻器都必須要有低功耗的特性。
本論文提出了一個壓控振盪器與一個四相位壓控振盪器與另一個除頻器電路。其中壓控振盪器是，利用使用MOSFET變容器交叉耦合互補式考畢子CMOS壓控振盪器與使用注入MOSFET耦合的四相位輸出振盪器。一個克萊普差動對的注入鎖定除頻器。以上電路使用台積電0.18微米CMOS製程來完成。另一個克萊普差動對的注入鎖定除頻器，使用聯電90奈米製程去實現。
首先，我們提出一個將兩組以n型電晶體和p型電晶體做為一組差動對之壓控振盪器，利用MOSFET的Body端做為一組調整偏壓點。當控制電壓由0.1到2 V變化時，壓控振盪器的頻帶可由5.88 GHz調到6.74 GHz，而在頻帶輸出頻率6.38 GHz，所量測到的相位雜訊在1 MHz位移時為-121.56 dBc/Hz。
其次，我們再以兩組壓控振盪器利用第一諧波訊號相互注入鎖定的方式設計一個LC-tank四相位的壓控振盪器，由一組ILO輸出訊號注入另一組ILO的MOS電晶體閘極端，由兩組ILO訊號耦合產生四相位的輸出訊號。當控制電壓由0.2到2 V變化時，壓控振盪器的頻帶可由5.44GHz調到5.95 GHz，而在頻帶輸出頻率5.91 GHz，所量測到的相位雜訊在1 MHz位移時為-121.52 dBc/Hz。
最後，我們討論一個寬頻帶nMOS LC-tank克萊普LC串聯共振之除2直接注入鎖定除頻器。在這個電路中我們會使用一個NMOSFET元件做為一個注入訊號用。當直流電壓為1.1 V時，控制電壓由0到1 V變化時，頻率可調範圍從20.247 GHz到18.331 GHz可調範圍約為1.916 GHz。量測到的頻帶操作鎖定範圍為35.9至42.5 GHz。

In wireless communication system, frequency synthesizers are used to implement the frequency up/down converting of signal. In a frequency synthesizer, voltage-controlled oscillator (VCO) and divider are the key blocks. For VCOs, low phase-noise output is required to avoid corrupting the mixer-converted signal by close interfering tones. The frequency of output signal of VCO is divided down to the level of reference signal, and is compared with reference signal by a phase frequency detector (PFD) to adjust the output of VCO. Therefore the dividers must have the ability of high frequency operation. Because of wireless application, both of them should operate at low power consumption.
This thesis proposes VCO ,QVCO and frequency dividers by 2. A Cross-Coupled Complementary Colpitts CMOS Tuned with Gated MOSFET Varactors, CMOS Quadrature VCO Using the Injection MOSFET Coupling, A Wide-locking Range Differential Clapp Injection-Locked Frequency Divider .The above circuits are fabricated in the TSMC 0.18 μm CMOS process. Another one is a Differential Clapp ILFD implemented in the UMC 90 nm process.
Firstly, MOSFET Body adjust the bias voltage point has been used to design a voltage-controlled oscillator (VCO), which consists of n-core and p-core VCOs. The oscillating frequency of the VCO can be tuned from 5.88 GHz to 6.74 GHz, while the tuning voltage varies from 0.1 V to 2 V. The phase noise of the oscillation frequency 6.38 GHz is -121.56 dBc/Hz at 1 MHz frequency offset.
Secondly, The LC-tank QVCO consists of two first-harmonic injection-locked oscillators (ILOs), The outputs of one ILO are injected to the gates of the MOS transistors on the other ILO and vice versa so as to force the two ILOs operate in quadrature. The oscillating frequency of the QVCO can be tuned from 5.44 GHz to 5.95 GHz, while the tuning voltage varies from 0.2 V to 2 V. The phase noise of the oscillation frequency 5.91 GHz is -121.52 dBc/Hz at 1 MHz frequency offset.
Finally, The designed circuit topology is an all nMOS LC-tank Clapp ILFD using a series-tuned resonator.In this circuit,we will use an NMOSFET device used as signal injection. At the supply voltage of 1.1 V. Tuning range is about 1.916 GHz, from 20.247 to 18.331 GHz, while the control voltage was tuned from 0 to 1.0 V. The operation range is about 6.6 GHz, from 35.9 GHz to 42.5 GHz.

Table of Contents
中文摘要	……………………………………………………………………………………..I
Abstract	…………………………………………………………………………………..III
致謝	…………………………………………………………………………………….V
Table of Contents	VI
List of Figures	VIII
List of Tables	XI
Chapter1……………………………………………………………………………….1
Introduction	…………………………………………………………………………...1
1.1 Motivation	1
1.2 Thesis Organization	4
Chapter2 Overview of the Voltage-Controlled Oscillators	5
2.1 Introduction	5
2.2 Basic Theory of Oscillators	6
2.3 Classification of Oscillators	10
2.3.1 Ring Oscillator	10
2.3.2 LC-Tank Oscillator	12
2.4 RLC-Tank research	16
2.4.1 Quality Factor	17
2.4.2 Inductor and Transformer	20
2.4.3 Capacitors and Varactors	34
2.4.4 Resistors	39
2.5 Design Concepts of Voltage-Controlled Oscilator	40
2.5.1 VCO characteristic parameters	41
2.5.2 Phase Noise in Oscillator	43
2.5.3 Quadrature VCO Design	50
Chapter 3 Design of VCO and QVCO	56
3.1 A Cross-Coupled Complementary Colpitts CMOS Tuned with Gated 00MOSFET Varactors	56
3.1.1 Introduction	56
3.1.2 Circuit Design of Cross-Coupled Colpitts VCO	57
3.1.3 Measurement Results	60
3.2 CMOS Quadrature VCO Using the Injection MOSFET Coupling	63
3.2.1 Introduction	63
3.2.2 Circuit Design	64
3.2.3 Measurement Results	67
Chapter 4 Overview of Injection-Locked Frequency Dividers	70
4.1 Principle of Injection-Locked Frequency Divider	71
4.1.1 Locking Range	72
4.1.2 ILFD’s Fundamental Block Diagram	75
4.1.3 ILFD’s Noise	76
Chapter 5 Design of the Injection-Locked Frequency Divider	81
5.1 A Wide-locking Range Differential Clapp Injection-Locked Frequency 000Divider	81
5.1.1 Introduction	81
5.1.2 Design of Differential Clapp ILFD	82
5.1.3 Measurement Results	85
Chapter 6 Conclusion	89
References	…………………………………………………………………………………...91
Author’s Brief Introduction	96

                                

[1] B. Razavi, RF Microelectronics, Upper Saddle River, NJ: Prentice Hall, 1998
[2] N. M. Nguyen, and R. G. Meyer, “Start-up and frequency stability in high-frequency oscillators,” IEEE J. Solid-State Circuits, vol. 27, no. 5, pp. 810−820, May 1992.
[3] B. Razavi,Design of Analog CMOS Integrated Circuit,Mc Graw Hill,2008
[4] T. H. Lee, The Design of CMOS Radio Frequency Integrated Circuits, Cambridge University Press 1998.
[5] H. M. Greenhouse, “Design of planar rectangular microelectronic inductors,” IEEE Transactions on Parts, Hybrids, and Packaging, vol. 10, pp. 101-109, Jun 1974.
[6] J. Craninckx and M. S. J. Steyaert, “A 1.8 GHz low-phase-noise CMOS VCO using optimized hollow spiral inductors,” IEEE J. Solid-State Circuits, vol. 32, no. 5, pp. 736–744, May 1997.
[7] C. P. Yue, C. Ryu, JackLau, T. H. Lee, and S. Wong, “A physical model for planar spiral inductors on silicon,” 1996 International Electron Devices Meeting Technical Digest, pp. 155–158, Dec. 1996.
[8] J. R. Long, “Monolithic transformers for silicon RF IC design,” IEEE Journal of Solid-State Circuits, vol. 35, pp. 1368-1382, Sept. 2000.
[9] E. Frlan, S. Meszaros, M. Cuhaci, and J.Wight, “Computer-aided design of square spiral transformers and inductors,” in Proc. IEEE MTT-S, pp. 661-664, June 1989.
[10] P. Andreani, S. Mattisson, “On the use of MOS varactors in RF VCOs,” IEEE Journal of Solid-State Circuits, vol. 35, no. 6, pp. 905-910, June 2000.
[11] J. van der Tang, and D. Kasperkovitz, “Oscillator design efficiency: a new figure of merit for oscillator benchmarking,” IEEE International Symposium on Circuit and System (ISCAS), vol. 2, pp. 533-536, May 2000.
[12] J.J. Rael, and A. A. Abidi, “Physical processes of phase noise in differential LC oscillators,” IEEE Custom Integrated Circuits Conference, pp. 569–572, 2000.
[13] T. Lee and A. Hajimiri, “Oscillator phase noise: a tutorial,” IEEE J. Solid-State Circuits, vol. 35, no. 3, pp. 326–336, Mar. 2000.
[14] D. Leeson, “A simple model of feedback oscillator noise spectrum,” Proceedings of the IEEE, vol. 54, pp. 329–330, Feb. 1966.
[15] A. Hajimiri and T. H. Lee, “A general theory of phase noise in electrical oscillators,” IEEE J. Solid-State Circuits, vol. 33, no. 2, pp. 179–194, Feb. 1998.
[16] A. Hajimiri and T. H. Lee, “Design Issues in CMOS differential LC Oscillators,” IEEE J. Solid-State Circuits, vol. 34, pp. 717–724, May 1999.
[17] R. Aparicio and A. Hajimiri, “A noise-shifting differential Colpitts VCO,” IEEE J. Solid-State Circuits, vol. 12, no. 12, pp. 1728–1736, Dec. 2002.
[18] X. Li, S. Shekhar and D. J. Allstot, “Gm-boosted common-gate LNA and differential Colpitts VCO/QVCO in 0.18 μm CMOS,“IEEE J. Solid-State Circuits, vol. 40, no. 12, pp. 2609-2619, Dec. 2005.
[19] C.-Y. Cha and S.-G. Lee, “A complementary Colpitts oscillator in CMOS technology,” IEEE Trans. Micro. Theory and Tech., vol. 53, no. 3, pp. 881-887, Mar. 2005.
[20] S.-L. Jang, C.-Y. Wu, C.-C. Liu, and M.-H. Juang, ”A 5.6 GHz low power balanced VCO in 0.18 μm CMOS,” IEEE Microw. Wireless Compon. Lett., pp. 233-235, April, 2009.
[21] P. Andreani and S. Mattisson, “On the use of MOS varactors in RF VCO’s,” IEEE J. Solid-State Circuits, vol. 35, no. 6, pp. 905–910, Jun. 2000.
[22] S.-H. Li, S.-L. Jang, Y.-S. Chuang and C.-F. Li, “A new LC-tank voltage controlled oscillator,” in IEEE Asia-Pacific Cir. Syst. Conf., Dec. 2004, pp. 425 – 427.
[23] A. Hajimiri and T. Lee, “A general theory of phase noise in electrical oscillators,” IEEE J. Solid-State Circuits, vol. 33, pp. 179–194, Feb. 1998.
[24] Y. J. Chan, C. F. Huang, C. C. Wu, C. H. Chen, and C. P. Chao, “Performance consideration of MOS and junction diodes for varactor application,” IEEE Trans. Electron Devices, 54(9):2570–2573, 2007.
[25] M.-D. Tsai, Y.-H. Cho and H. Wang, “A 5-GHz low phase noise differential Colpitts CMOS VCO,” IEEE Microwave Wireless Compon. Lett., vol. 15, no 5, pp. 327-329, May 2005.
[26] C. M. Hung, B. Floyd and K. K. O, “A fully integrated 5.35-GHz CMOS VCO and a prescaler, “IEEE Trans. Microwave Theory Tech., vol. 49, no. 1, pp. 17-22, Jan. 2001.
[27] S.-L. Jang, C.-F. Lee, and C.-W. Chang, “A K-Band differential Colpitts cross-coupled VCO in 0.13 μm CMOS,” Solid-State Electron., vol. 53, No. 9, pp. 931-934, Sept., 2009.
[28] A. Rofougaran, J. Rael, M. Rofougaran, and A. Abidi, “A 900-MHz CMOS LC-oscillator with quadrature outputs,” in ISSCC Dig. Tech. Papers, Feb. 1996, pp. 392–393.
[29] T.-P. Liu, “A 6.5-GHz monolithic CMOS voltage-controlled oscillator,” in ISSCC Dig. Tech. Papers, Feb. 1999, pp. 404–405.
[30] P. Andreani and X. Wang, “On the phase-noise and phase-error performances of multiphase LC CMOS VCOs,” IEEE J. Solid-State Circuits, vol. 39, no. 11, pp. 1883–1893, Nov. 2004.
[31] S. L. J. Gierkink, S. Levantino, R. C. Frye, C. Samori, and V. Boccuzzi, “A low-phase-noise 5-GHz CMOS quadrature VCO using superharmonic coupling,” IEEE J. Solid-State Circuits, vol. 38, no. 7, pp. 1148–1154, July 2003
[32] P. Tortori, D. Guermandi, E. Franchi, and A. Gnudi, “Quadrature VCO based on direct second harmonic locking,” in Proc. ISCAS, May 2004, pp. 169–172.
[33] S.-L. Jang, S.-H. Huang, C.-C. Liu and M.-H. Juang, ” CMOS Colpitts quadrature VCO using the body injection-locked coupling technique,” IEEE Microw. Wireless Compon. Lett., pp. 230-232, April, 2009
[34] S.-L. Jang, C.-C. Liu, J.-F. Huang, Y.-K. Wu, and J.-J. Chen, ” Quadrature VCOs using single-ended injected injection-locked frequency dividers,” IEICE Trans. Electron., Vol.E92-C, No.9, pp.1226-1229, Sept. 2009.
[35] S.-L. Jang, S.-S. Huang, C.-F. Lee, and M.-H. Juang ” CMOS quadrature VCO implemented with two first-harmonic injection-locked oscillators,” IEEE Microw. Wireless Compon. Lett., pp.695-697, Oct. 2008.
[36] S.-H. Li, S.-L. Jang, Y.-S. Chuang and C.-F. Li, “A new LC-tank voltage controlled oscillator,” in IEEE Asia-Pacific Cir. Syst. Conf., Dec. 2004, pp. 425 – 427.
[37] J.-H. Chang and C.-K. Kim, “A symmetrical 6-GHz fully integrated cascode coupling CMOS LC quadrature VCO,” IEEE Microw. Wireless Compon. Lett., vol. 15, no. 10, pp. 670-672, Oct. 2005.
[38] T.-H. Huang and Y.-R. Tseng, ” A 1 V 2.2 mW 7 GHz CMOS quadrature VCO using current-reuse and cross-coupled transformer-feedback technology,” IEEE Microw. Wireless Compon. Lett., pp. 698-700, Oct., 2008.
[39] S.-L. Jang, T.-S. Lee, C.-W. Hsue and C.-W. Chang, ” A low voltage and low power bottom-series coupled quadrature VCO,” IEEE Microw. Wireless Compon. Lett., vol. 19, No. 11, 722-724, Nov., 2009.
[40] S.-Y. Lee, L.-H. Wang, and Y.-H. Lin , “A CMOS quadrature VCO with subharmonic and injection-locked techniques ,”IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 57, no. 11, pp. 843–847, Nov. 2010.
[41] M. Tiebout, “A CMOS direct injection-locked oscillator topology as high-frequency low-power frequency divider,” IEEE J. Solid-State Circuits, vol. 39, no. 7, pp. 1170–1174, Jul. 2004.
[42] H. Wu and A. Hajimiri, “A 19 GHz 0.5mW 0.35 μmCMOS frequency divider with shunt-peaking locking-range enhancement,” ISSCC Tech. Dig., Feb. 2001, pp. 412–413.
[43] J. Craninckx and M. S. J. Steyaert, “A 1.75-GHz/3-V dual-modulus divide-by- 128/129 prescaler in 0.7-μm CMOS,” IEEE J. Solid-State Circuits, vol. 31, no. 7, pp. 890−897, July 1996.
[44] Q. Huang and R. Rogenmoser, “Speed optimization of edge-triggered CMOS circuits for gigahertz single-phase clocks,” IEEE J. Solid-State Circuits, vol. 31, no. 3, pp. 456−463, Mar. 1996.
[45] J. Lee and B. Razavi, “A 40 GHz frequency divider in 0.18-μm CMOS technology,” IEEE J. Solid-State Circuits, vol. 39, no. 4, pp. 594−601, Apr. 2004.
[46] H. R. Rategh and T. H. Lee, “Superharmonic injection-locked frequency dividers,” IEEE J. Solid-State Circuits, vol. 34, no. 6, pp. 813−821, Jun. 1999.
[47] H. D. Wohlmuth and D. Kehrer, “A high sensitivity static 2:1 frequency divider up to 27 GHz in 120 nm CMOS,” IEEE European Solid State Circuits Conference (ESSCIRC), Sept. 2002, pp. 823−826.
[48] M. Tiebout, “A 480 μW 2 GHz ultra low power dual-modulus prescaler in 0.25 μm standard CMOS,” IEEE International Symposium on Circuit and System (ISCAS), May 2000, vol. 5, pp. 741−744.
[49] R. J. Betancourt-Zamora, S. Verma, and T. H. Lee, “1 GHz and 2.8 GHz CMOS injection-locked ring oscillator prescalers,” IEEE Symposium on VLSI Circuits, Jun. 2001, pp. 47−50.
[50] P. Kinget, R. Melville, D. Long, and V. Gopinathan, “An injection locking scheme for precision quadrature generation,” IEEE J. Solid-State Circuits, vol. 37, no. 7, pp. 845−851, Jul. 2002.
[51] W. Z. Chen and C. L. Kuo, “18 GHz and 7 GHz superharmonic injection-locked dividers in 0.25 μm CMOS technology,” IEEE European Solid State Circuits Conference (ESSCIRC), Sept. 2002, pp. 89−92
[52] H. Wu, Signal generation and processing in high-frequency/high-speed silicon- based integrated circuits, PhD thesis, California Institute of Technology, 2003.
[53] R. Adler, “A study of locking phenomena in oscillators,” Proc. IEEE, vol. 61, pp. 1380−1385, Oct. 1973.
[54] H. R. Rategh and T. H. Lee, “Superharmonic injection-locked frequency dividers,” IEEE J. Solid-State Circuits, vol. 34, no. 6, pp. 813–821, Jun. 1999.
[55] M. Tiebout, “A CMOS direct injection-locked oscillator topology as high-frequency low-power frequency divider,” IEEE J. Solid-State Circuits, vol. 39, no. 7, pp. 1170–1174, Jul. 2004.
[56] S.-L. Jang, M.-H. Suchen, and C.-F. Lee, ” Colpitts injection locked frequency divider implemented with a 3D helical transformer ,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 6, pp.410-412, June, 2008.
[57] S.-L. Jang, S.-S. Huang, J.-F. Lee and M.-H. Juang , ” LC-tank Colpitts injection-locked frequency divider with record locking range,” IEEE Microw. Wireless Compon. Lett., pp.560-562, Aug. 2008.
[58] S.-L. Jang, C.-W. Lin, C. C. Liu, and M.-H. Juang, ” An active-inductor injection locked frequency divider with variable division ratio,” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 1, pp. 39-41, Jan. 2009.
[59] S.-L. Jang, Y.-J. Song, and C.-C. Liu, ” A differential Clapp VCO in 0.13 µm CMOS technology,” IEEE Microw. Wireless Compon. Lett., pp. 404-406, June, 2009.
[60] S.-L. Jang, C.-C. Liu, Y.-J. Song, and M.-H. Juang , ” A low voltage balanced Clapp VCO in 0.13 μm CMOS technology,” Microwave and Optical Technology Lett., vol. 52, no. 7, pp., 1623-1625, 2010.
[61] S.-L. Jang, R.-K. Yang, C.-C. Liu, and C.-W. Hsue, ” A low power SiGe BiCMOS series-tuned divide-by-3 injection locked oscillators ,” Microwave and Optical Tech. Lett., vol. 51, No.9, pp. 2239-2242, 2009.
[62] T. Ohira, ” Extended Adler's injection locked Q factor formula for general one- and two-port active device oscillators,” IEICE Electronics Express, Vol. 7, No.19, 1486–1492. 2010.
[63] J. Lee and B. Razavi, “A 40 GHz frequency divider in 0.18-μm CMOS technology,” IEEE J. Solid-State Circuits, vol. 39, no. 4, pp. 594–601, Apr. 2004.
[64] M. Tiebout, “A CMOS direct injection-locked oscillator topology as high-frequency low-power frequency divider,” IEEE J. Solid-State Circuits, vol. 39, no. 7, pp. 1170–1174, Jul. 2004.

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