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研究生: 陳威宏
Wei-Hung Chen
論文名稱: 使用被動整合電路製程之300 GHz WR03波導與基板合成波導轉接電路與晶片上號角天線
300 GHz On-chip WR-03 Waveguide to Substrate Integrated Waveguide Transition and On-chip Horn Antenna using Integrated Passive Device
指導教授: 馬自莊
Tzyh-Ghuang Ma
口試委員: 吳宗霖
鄭宇翔
陳晏笙
馬自莊
學位類別: 碩士
Master
系所名稱: 電資學院 - 電機工程系
Department of Electrical Engineering
論文出版年: 2023
畢業學年度: 112
語文別: 英文
論文頁數: 116
中文關鍵詞: H平面號角天線被動整合電路製程晶片天線矩形波導分裂塊模組基板整合波導太赫茲轉接電路
外文關鍵詞: H-plane Horn Antenna, Integrated Passive Device, On-chip Antenna, Rectangular Waveguide, Split-blocks, Substrate Integrated Waveguide, Terahertz, Transition
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  • 本篇論文的研究主題主要分為兩項,其操作中心頻率為300 GHz。第一、WR03矩形波導與基板整合波導之轉接電路;第二、基於前項設計之轉接結構,設計一晶片上基板整合波導之H平面號角天線。本研究皆使用台灣半導體研究中心所提供之穩懋被動整合電路製程。
    轉接電路的部分,先於製程環境中萃取並模擬基板整合波導之特性。在基板整合波導的末端,設計了由貫孔圍繞而成的共振腔體,並且於上方形成孔徑用於與分裂塊中的WR-03矩形波導進行耦合。孔徑的角落則增加兩對梯狀結構,且在波導末端亦設計一雙階梯的步階式轉換器,以改善頻寬及匹配性能。本設計為方便量測,因此採用背對背配置,在300 GHz預期S參數模擬結果為|S11| = -38.32 dB、|S22| = -38.41 dB和|S21| = -1.06 dB。經計算得到的3-dB比例頻寬為13%。
    H平面號角天線的部分,信號利用前段所設計之轉接電路,透過WR-03矩形波導與基板整合波導之轉接電路饋入晶片天線。整體的天線元件包括雙階梯之步階式狀WR-03波導、雙階梯之耦合孔徑、基板合成波導和H平面號角天線。於中心頻率300 GHz時,模擬S參數顯示|S11|為-12.4 dB,實現增益峰值為6.4 dBi,且天線場型實現所規劃之端射輻射。
    又,本研究製作鋁製分裂塊,不僅用於嵌入轉接電路和天線的IPD晶片,並形成WR-03矩形波導用於測量。所有分裂塊皆完成檢驗其製造品質。該晶片模組經量測,呈現與模擬結果之巨大誤差,吾人根據鋁製分裂塊之影像結果,針對誤差重新模擬進行分析,獲得合理之成因解釋。

    關鍵字:H平面號角天線、被動整合電路製程、晶片天線、矩形波導、分裂塊模組、基板整合波導、太赫茲、轉接電路


    In this thesis, two main topics are researched centered at 300 GHz. The first one is a WR-03 rectangular waveguide to substrate integrated waveguide (SIW) transition. For the second topic, an on-chip SIW H-plane horn antenna is designed on the basis of the transition. The fabrication process used is the integrated passive device (IPD) technology provided by the Taiwan Semiconductor Research Institute (TSRI).
    For the transition, a substrate integrated waveguide is designed. At the end of the SIW, a cavity surrounded by through substrate vias is designed to form a resonating structure with an aperture created on the top layer for coupling electromagnetic fields to the WR-03 rectangular waveguide formed by the split-blocks. A back-to-back transition is implemented for measurement purposes.
    For the H-plane horn antenna, the signal is fed through a WR-03 rectangular waveguide section to the substrate integrated waveguide transition as previously designed. The antenna element comprises a stepped-waveguide section, a tapered coupling aperture, a substrate integrated waveguide section, and a H-plane horn antenna on the IPD process.
    Aluminum split-blocks are designed to house the both the IPD chips of the transition and the antenna, and to form WR-03 rectangular waveguide sections for measurement purposes. The transition and antenna chip modules are measured, and the huge discrepancy due to fabrication errors are analyzed, discussed and re-simulated with the help of the micro photo images of the split-blocks.

    Keywords: H-plane Horn Antenna, Integrated Passive Device, On-chip Antenna, Rectangular Waveguide, Split-blocks, Substrate Integrated Waveguide, Terahertz, Transition

    摘要 I Abstract II Contents III List of Figures VIII List of Tables XVI Chapter 1 1 Introduction 1 1.1 Background and Motivation 1 1.2 Literature Survey 3 1.2.1 Relevant researches of waveguide transitions 3 1.2.2 Relevant researches on SIW antennas and THz antennas 7 1.3 Contributions 10 1.4 Outline of the Thesis 11 Chapter 2 12 WR-03 Waveguide to SIW Transition 12 2.1 Fabrication Process 13 2.1.1 Integrated Passive Device 13 2.1.2 Design Rule 14 2.2 Design & Simulation 15 2.2.1 Transmission Structure 15 2.2.2 Waveguide to SIW Transition 24 2.2.3 Back-to-back Transition for Validation 29 2.2.4 Split-blocks 36 2.3 Fabrication 42 2.3.1 IPD Chip 42 2.3.2 Split-blocks 43 2.3.3 Integration 47 2.4 Measurement 53 2.4.1 Measurement 53 2.4.2 Re-simulation of Defects of Steps and Air Gaps 56 2.4.3 Re-simulation of Defects of Steps Including Surface Roughness 59 2.5 Summary 65 Chapter 3 67 On-chip SIW Horn Antenna 67 3.1 Design 68 3.1.1 Waveguide to SIW Transition 68 3.1.2 Horn Antenna Element 71 3.1.3 Split-blocks 79 3.1.4 Discussion 85 3.2 Fabrication 86 3.2.1 IPD Chip 86 3.2.2 Split-blocks 87 3.2.3 Integration 91 3.3 Measurement 95 3.3.1 Measurement 95 3.3.2 Re-simulation of the Fabrication Errors 96 3.4 Summary 102 Chapter 4 104 Conclusion 104 4.1 Summary 104 4.2 Future Studies 105 References 106

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