電壓控制振盪器(VCO)和鎖定除頻器(FD)在頻率合成器中是相當重要的區塊，對於現今可攜式的消費型產品和多頻段系統應用的普及，電路除了須滿足高效能，低複雜度等特性外，低功耗的設計需求在近年來也變得越來越受到重視

本篇論文提出了三個電壓控制振盪器與一個注入鎖定除頻器，壓控振盪器的部分總共有三顆，第一顆晶片實現於台積電0.18微米矽鍺製程,電路的操作頻帶在5.6GHz的低相位雜訊壓控振盪器，第二顆晶片則是用台積電0.18微米一般製程實現的三頻帶壓控振盪器操作的頻帶分別是9GHz、10GHz、4GHz，第三顆晶片則是用台積電90奈米製程、操作頻帶在4GHz、9GHz的四相位雙頻帶壓控振盪器。此外，在注入鎖定除頻器的部分，則有一顆是利用台積電0.18微米一般製程實現，具有80%鎖定範圍與78%可調範圍之主動電感架構的除三注入鎖定除頻器。

在第一部分我們利用矽鍺異質接片電晶體具有低閃爍雜訊的可以提升電路的相位雜訊特性，提出一個利用台積電0.18微米矽鍺製程實現的壓控振盪器，，在的電源給定為1.5V時，電路操作的頻段為5.6GHz，相位雜訊在1MHz的地方為-122.01 dBc/Hz。

在第二部份則是提出了一個利用考畢子和克萊普共振腔所合併所完成的雙共振腔電路，來實現三頻帶的壓控振盪器，此電路實現於台積電0.18微米一般製程，當電源給定1V時，電路的功率消耗為5.5mW，其操作的頻段分別是(1) 9.73 GHz to 11.06 GHz, (2) 9.07 GHz to 9.34 GHz, and (3) 3.64 GHz to 4.04 GHz。當電路操作在9.82 GHz，相位雜訊在1MHz的地方為-111.02，其FOM為-183.45 dBc/Hz。

第三部分則提出了一個利用90奈米製程實現的雙頻帶四相位壓控振盪器，
不同於以往利用主動元件來實現四相位機制，此電路利用一般電容耦合兩組差動輸出的壓控振盪器來實現四相位的機制，當電源給定1.1V時，電路的功率消耗為2.75mW，電路的操作頻率為(1) 8.77 GHz to 9.12 GHz (2) 3.68 GHz to 4.16 GHz
相位雜訊方面，在1MHz的地方分別為 (1)-120.39 dBc/Hz (2) -118.75 dBc/Hz，其FOM分別為(1)-194.86 dBc/Hz (2) -186.05 dBc/Hz

最後我們提出了一個利用雙推式架構的特性，來實現一雙推式之主動電感除三直接注入鎖定除頻器。當電源給定1.4V時，可調範圍為1.39 GHz to 3.18 GHz(78%)，其鎖定範圍則是從4.4 GHz to 10.3 GHz (80.27Hz) 。

The voltage controlled oscillator (VCO) and frequency divider (FD) plays a critical role at frequency synthesizer. For modern portable production (such as cell-phone) and multi-band system, the RF circuit satisfy except high-performance and low-complexity, designing requirements of these circuits become more stringent on the low-power, in recent years

This thesis presents two voltage-controlled oscillators (VCOs), one quadrature voltage-controlled oscillator (QVCO), and an avtive-inductor injection-locked frequency divider by 3 which is using push-push oscillator.

The first part we present a BiCMOS voltage-controlled oscillator (VCO), which was implemented in the standard TSMC 0.18 μm SiGe 3P6M BiCMOS process. The VCO consists of an nMOSFET cross-coupled oscillator stacked in series with source degenerated HBT diodes. SiGe HBT has an inherently low flicker noise compared to CMOS devices. At the supply voltage of 1.5 V, the output phase noise of the VCO is -122.01 dBc/Hz at 1 MHz offset frequency from the carrier frequency of 5.6 GHz, and the figure of merit is -190.43 dBc/Hz.

Secondly, we propose a differential triple-band voltage-controlled oscillator (VCO) which was designed and implemented in a 0.18 μm CMOS 1P6M process. The designed VCO circuit uses a differential Colpitts negative resistance cell and fourth-order passive LC resonator. At the supply voltage of 1 V, the core power consumption is 5.5 mW. The tuning range of the triple frequency bands are (1) 9.73 GHz to 11.06 GHz, (2) 9.07 GHz to 9.34 GHz, and (3) 3.64 GHz to 4.04 GHz. The output phase noise of the VCO is -111.02 dBc/Hz at 1 MHz offset frequency from the carrier frequency of 9.82 GHz, and the figure of merit is -183.45 dBc/Hz.

In The third part, a dual-band quadrature voltage-controlled oscillator (QVCO) has been studied and implemented in the TSMC 90nm 1P9M CMOS technology. The proposed CMOS QVCO comprises two complementary cross-coupled dual-resonance VCOs and 4 capacitors in a ring for coupling the two differential VCOs. The die area of the dual-band QVCO is 0.831×0.97 mm2. At the supply voltage of 1.1 V, the total power consumption is 2.75 mW. The free-running frequency of the QVCO is tunable from 8.77/3.68 GHz to 9.12/4.16 GHz as the tuning voltage is varied from 0.0/0.6 V to 0.5/1.1 V. The measured phase noise at 1 MHz frequency offset is -120.39/-118.75 dBc/Hz at the oscillation frequency of 8.79/3.847 GHz and the figure of merit (FOM) of the proposed QVCO is -194.86/-186.05 dBc/Hz.

Finally, a new wide locking range active-inductor divide-by-3 injection-locked frequency divider (ILFD) using a standard 0.18 μm CMOS process is presented. The push-push ILFD circuit is realized with a push-push cross-coupled n-core MOS LC-tank oscillator. The core power consumption of the ILFD core is 7.41 mW. The divider’s free-running frequency is tunable from 1.39 GHz to 3.18 GHz by tuning the varactor’s control bias, and at the incident power of 0 dBm the maximum locking range is 2.9 GHz (43.6%), from the incident frequency 5.2 GHz to 8.1 GHz. The operation range is 5.9 GHz (80.27%), from 4.4 GHz to 10.3 GHz.

[1] N. M. Nguyen and R. G. Meyer, “Start-up and frequency stability in high-frequency oscillators,” IEEE J. Solid-State Circuit, vol. 27, no. 5, pp. 810–820, May 1992.

[2] B.Razavi, RF Microelectronics, Prentice Hall PTR 1998.

[3] 陳博軒,辛裕明 “Ka頻段之交錯耦合雙推式壓控振盪器,” 2007.07.

[4] Behzad Razavi Design of Integrated Circuits for Optical Communications, Mc Graw Hill.

[5] B. Razavi, Design of Analog CMOS Integrated Circuits, Mc Graw Hill, 2001.

[6] S. –Jun. Lee, B. Kim, K. Lee, “A Novel High-Speed Ring Oscillator for Multiphase Clock Generation Using Negative Skewed Delay Scheme,” IEEE Journal of Solid-State Circuits, vol. 32, No. 2, February 1997.

[7] 劉隽宇, 翁若敏, “運用於IEEE 802.11a CMOS 頻率合成器的低雜訊寬調變範圍之壓控振盪器,” 2005.07.

[8] 林曉彤, 莊惠如, “應用於無線通訊之CMOS 射頻微機電開關及2-GHz/5-GHz 壓控振盪器RFIC之研究” 2004.06.

[9] 李少華, 張勝良, “Implementation of New High Frequency CMOS VCOs and Injection-Locked Frequency Dividers,” 2007 04.

[10] A. Hajimiri, and T. H. Lee, “The design of low noise oscillators,” Kluwer Academic Publishers, 1999

[11] B. De Muer, M. Borremans, M.Steyaert, and G. Li Puma, “A 2GHz low-phase-noise integrated LC-VCO set with flicker-noise upconversion minimization,” IEEE J. Solid-State Circuits, vol. 35, pp. 1034-1038, 2000.

[12] S. Levantino, C. Samori, A. Bonfanti, S.L.J. Gierkink, A.L. Lacaita, and V. Boccuzzi, “frequency dependence on bias current in 5 GHz CMOS VCOs: impact on tuning range and flicker noise upconversion,” IEEE J. Solid-State Circuits, vol. 37, pp. 1003-1001, 2002.

[13] J. Tang and D. Kasperkovitz, Oscillator Design Efficiency: A New Figure Of Merit For Oscillator Benchmarking.

[14] D. Hauspie, E.-C. Park, and J. Craninckx, “Wide-band VCO with simultaneous switching of frequency band, active core, and varactor size,” IEEE J. Solid-State Circuits, vol. 42, no. 7, pp. 1472–1480, Jul. 2007.

[15] T. H. Lee, “The Design of CMOS Radio Frequency Integrated Circuits,” Cambridge University Press 1998.

[16] John Starr Hamel “LC tank Voltage Controlled Oscillator Tutorial,” Waterloo, Ontario, Canade, 2005

[17] D. B. Leeson, “A simple model of feedback oscillator noise spectrum,” Proceedings of the IEEE, vol. 54, no. 2, pp. 329–330, Feb. 1966

[18] A. Hajimiri and T. Lee, “A general theory of phase noise in electrical oscillators,” IEEE J. Solid-State Circuits, vol. 33, no. 2, pp. 179–194, Feb. 1998.

[19] T. H. Lee and A. Hajimiri, “Oscillator phase noise: a tutorial,” IEEE J. Solid-State Circuit, vol. 35, no. 3, pp. 326–336, Mar. 2000.

[20] J. M. C. Wong and H. C. Luong, “A 1.5-V 4-GHz dynamic-loading regenerative frequency doubler in a 0.35-μm CMOS process,” IEEE Trans. Circuits Syst. II: Analog Digit. Signal Process., vol. 50, no. 8, pp. 450–455, Aug. 2003.

[21] K. Yamamoto. “ A 1.8V Operation 5-GHz-Bnad CMOS Frequency Doubler
Using Current-Reuse Circuit Design Technique.” IEEE J. Solid- State Circuits, 40(6):1288.1295, June 2005.

[22] X. Zhang, and Y-H Yun, “A DC to X-band frequency doubler using GaAs
HBT MMIC,” 1997 IEEE MTT-S Int. Microwave Symp. Digest, vol. 3, pp. 1213-1216, June 1997.

[23] R. G. Freitag, S. H. Lee, D. M. Krafcsil, D. E. Dawson, and J. E. Degenford, “Stability and improved circuit modeling considerations for high power MMIC amplifiers, ” 1988 IEEE MTT-S International Microwave Symposium Digest, New York, NY, pp. 125-128, May 1988.

[24] R. G. Freitag, “A unified analysis of MMIC power amplifier stability, ” 1992 IEEE MTT-S International Microwave Symposium Digest, Albuquerque, New Mexico, pp. 297-300, June 1992.

[25] 唐毓隆, “ 三推式振盪器,” 碩士論文, 國立台灣大學, 民國88 年.

[26] Pin-Pin Huang, Tian-Wei Huang, Huei Wang, E.W. Lin, Yonghui Shu, G.S.
Dow, R. Lai, M. Biedenbender and J.H. Elliott, “A 94-GHz 0.35-W power amplifier module, ” IEEE Trans. On Microwave Theory and Tech., vol. 45, no. 12, part 2, pp. 2418-2423, Dec. 1997.

[27] D. L. Ingram, D. I. Stones, J. H. Elliott, Huei Wang, R. Lai and M. Biedenbender, “A 6-W Ka-band power module using MMIC power amplifiers, ” IEEE Trans. On Microwave Theory and Tech., vol. 45, no. 12, part 2, pp. 2424-2430, Dec. 1997.

[28] J. Craninckx and M. S. J. Steyaert, “A 1.75-GHz/3-V dual-modulus divide-by-128/ 129 prescaler in 0.7 um CMOS,” IEEE J. Solid-State Circuits, vol. 31, pp. 890-897, July 1996.

[29] Q. Huang and R. Rogenmoser, “Speed optimization of edge-triggered CMOS
circuits for gigahertz single-phase clocks,” IEEE J. Solid-State Circuits, vol. 31, pp. 456-463, Mar. 1996.

[30] J. Lee and B. Razavi, “A 40 GHz frequency divider in 0.18-um CMOS
technology,” IEEE J. Solid-State Circuits, vol. 39, pp. 594-601, Apr. 2004.

[31] H. R. Rategh, and T.H. Lee, “Superharmonic injection-locked frequency
dividers,” IEEE J. Solid-State Circuits, vol. 34, pp. 813-821, June 1999.

[32] H. D. Wohlmuth and D. Kehrer, “A high sensitivity static 2:1 frequency divider up to 27 GHz in 120 nm CMOS,” IEEE European Solid State Circuits Conference (ESSCIRC), pp. 823-826, Sept. 2002.

[33] M. Tiebout, “A 480 uW 2 GHz ultra low power dual-modulus prescaler in
0.25 um standard CMOS,” IEEE International Symposium on Circuit and System (ISCAS), vol. 5, pp. 741-744, May 2000.

[34] H. Wu, and A. Hajimiri, “A 19 GHz 0.5 mW 0.35 μm CMOS frequency divider with shunt-peaking locking-range enhancement,” IEEE ISSCC Dig. Tech. Papers, pp. 412-413, Feb. 2001.

[35] R. J. Betancourt-Zamora, S. Verma, and T. H. Lee, “1 GHz and 2.8 GHz CMOS injection- locked ring oscillator prescalers,” IEEE Symposium on VLSI Circuits, pp. 47-50, June 2001.

[36] P. Kinget, R. Melville, D. Long, and V. Gopinathan, “An Injection Locking
Scheme for Precision Quadrature Generation,” IEEE J. Solid-State Circuits, vol. 37, pp. 845-851, July 2002.

[37] W. Z. Chen, and C. L. Kuo, “18 GHz and 7 GHz superharmonic injection-locked dividers in 0.25pm CMOS technology,” IEEE European Solid State Circuits Conference (ESSCIRC), pp. 89-92, Sept. 2002.

[38] H. Wu, “Signal generation and processing in high-frequency/high-speed
silicon-based integrated circuits,” PhD thesis, California Institute of Technology, 2003.

[39] R. Adler, “A study of locking phenomena in oscillators,” Proc. IEEE, vol. 61, pp.1380-1385, Oct. 1973.

[40] D. Friedman, M. Meghelli, B. Parker, J. Yang, H. Ainspan, and M. Soyuer, “A single-chip 12.5Gbaud transceiver for serial data communication,” IEEE Symp.VLSI Circuits, Digest of Tech., June 2001, pp. 145–148.

[41] D. Friedman, M. Meghelli, B. Parker, H. Ainspan, and M. Soyuer, “Sub-picosecond jitter SiGe BiCMOS transmit and receive PLLs for 12.5Gbaud serial data communication,” IEEE Symp. VLSI Circuits, Digest of Tech., June 2000, pp. 132–135.

[42] J.-H., C. Zhan, J. S. Duster and K. T. Kornegay, “A 25-GHz emitter degenerated LC VCO,” IEEE J. Solid-State Circuits, vol. 39, pp. 2062- 2064, Nov. 2004.

[43] G. Niu, J. D. Cressler, Z. Jin, S. Zhang, J. B. Juraver, M. Borgarino, R. Plana,and O. Llopis, “Transistor noise in SiGe HBT RF technology,” in Proc. IEEE BCTM, 2000, pp. 207–210.

[44] S. J. Yun, C. Y. Cha, H. C. Choi, and S. G. Lee, “RF CMOS LC-oscillator with source damping resistors,” IEEE Microwave and Components Letters, vol. 16, no. 9, pp. 511-513, Sept, 2006.

[45] B. Jung and R. Harjani, “A wide tuning range VCO using capacitive source degeneration,” IEEE Proc. Int. Symp. Circuits and Systems, Vol.4, 23-26 May 2004.

[46] Y.-H. Chuang, S.-L. Jang, S.-H. Lee, R.-H. Yen and J.-J. Jhao, “5 GHz low power current-reused balanced CMOS differential Armstrong VCOs,” IEEE Microw. Wireless Compon. Lett., pp. 139-141, Feb. 2007.

[47] R. Mukhopadhyay, C. H. Lee, J. Laskar, “A 580 μW 1.8-6 GHz multiband switched-resonator SiGe VCO with 0.3 V supply voltage,” IEEE Microw. Wireless Compon. Lett., vol. 17, no. 11, pp. 793-795, 2007.

[48] G. D. Astis, D. Cordeau, J.-M. Paillot, and L. Dascalescu, “A 5-GHz fully integrated full PMOS low-phase-noise LC VCO,” IEEE J. Solid-State Circuits, vol. 40, no. 10, pp. 2087–2091, Oct. 2005.

[49] Y. Chen, K. Mouthaan, “Wideband varactorless LC VCO using a tunable negative-inductance cell, ” IEEE Trans. Circuits And System-I:Regular Papers, vol. 57, no. 10, pp. 2609-2617, Oct. 2010.

[50] S. S. Myoung, J. G. Yook, “Low-phase-noise high-efficiency MMIC VCO based on InGap/GaAs HBT with the LC filter, ” Microwave And Optical Tech. Lett., vol. 44, no.2, pp. 123-126, January, 2005.

[51] V. Kakani, F. F. Dai, and R. C. Jaeger, “A 5 GHz low-power series coupled BiCMOS quadrature VCO with wide tuning range,” IEEE Microw. Wireless Compon. Lett., vol. 17, no. 6, pp. 457-459, Jun. 2007.

[52] S.-L. Jang, Y.-K. Wu, C.-C. Liu and J.-F. Huang, “A dual-band CMOS voltage-controlled oscillator implemented with dual-resonance LC tank,” IEEE Microw. Wireless Compon. Lett., vol. 19, No. 12, pp.816-818, Dec. 2009.

[53] N. T. Tchamov, S. S. Broussev, I. S. Uzunov, and K. K. Rantala, “Dual-band LC VCO architecture with a fourth-order resonator,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 54, no. 3, pp. 277–281, Mar. 2007.

[54] A. Hajimiri and T. Lee, “Design issues in CMOS differential LC oscillators,” IEEE J. of Solid-State Circuits, vol. 34, no. 5, pp. 717-724, May 1999.

[55] R. Aparicio and A. Hajimiri, “A noise-shifting differential Colpitts VCO,” IEEE J. of Solid-State Circuits, vol. 37, no. 12, pp. 1728-1736, Dec. 2002.

[56] S.-H. Lee, Y.-H. Chuang, S.-L. Jang, and C.-C. Chen, “Low-phase noise Hartley differential CMOS voltage controlled oscillator,” IEEE Microw. Wireless Compon. Lett., vol. 17, no. 2, pp. 145-147, Feb. 2007.

[57] S.-L. Jang, Y.-J. Song, and C.-C. Liu, “ A differential Clapp VCO in 0.13 µm CMOS Technology,” IEEE Microw. Wireless Compon. Lett., pp. 404-406, June, 2009

[58] S.-L. Jang, C.-C. Liu, Y.-J. Song, and M.-H. Juang , “ A low voltage balanced Clapp VCO in 0.13 μm CMOS technology,” Microwave and Optical Technology Lett., vol. 52, no. 7, pp., 1623-1625, 2010.

[59] A. Goel and H. Hashemi, “Concurrent dual-frequency oscillators and phase locked loop,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 8, pp. 1846-1860, August 2008.

[60] S.-L. Jang, L.-T. Chou and C.-W. Chang, “ Colpitts VCO with gate-series high-quality factor LC resonator,” Microwave and Optical Technology Lett., vol. 52, no. 10, pp., 2170-2173, 2010

[61] C.-H. Kim, S.-H. Shin and H.-J. Yoo, “A dual band CMOS quadrature VCO for low power and low phase noise application,” IEEE Conf. Radio Frequency Integration Technology (RFIT), December 2007, pp 310-313.

[62] S.-L. Jang, Y.-K. Wu, C.-C. Liu and J.-F. Huang, ” A dual-band CMOS voltage-controlled oscillator implemented with dual-resonance LC tank,” IEEE Microw. Wireless Compon. Lett., vol. 19, No. 12, pp.816-818, Dec. 2009.

[63] S. –L. Jang, C.-W. Chang, H.-A. Yeh, M.-H. Juang, and Y.-J. Song, ” CMOS quadrature VCOs using the diode coupling technique,” Microwave and Optical Technology Lett., pp.551-553, March, 2011.

[64] A. Bonfanti, S. Levantino, C. Samori, and A. L. Lacaita, “A varactor configuration minimizing the amplitude-to-phase noise conversion in VCOs,” IEEE Trans. Circuits Syst. I, vol. 53, no. 3, pp. 481–488, Mar. 2006.

[65] S. Rong and H. C. Luong, “A 1V 4 GHz-and-10 GHz transformer-based dual-band quadrature VCO in 0.18 μm CMOS,” CICC2007, pp.817-820, Sept. 2007.

[66] H. Shin, Z. Xu, and M. F. Chang, “A 1.8-V 6/9-GHz switchable dual-band quadrature LC VCO in SiGe BiCMOS technology,” in IEEE RFIC Symp. Jun. 2002, pp. 71–74.

[67] S.-L. Jang, C.-W. Lin, C. C. Liu, and M.-H. Juang, ” An active-inductor injection locked frequency divider with variable division ratio,” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 1, pp. 39-41, Jan. 2009.

[68] S.-L. Jang, C.-W. Tai, and C.-F. Lee,” Divide-by-3 injection locked frequency divider implemented with active inductor,” Microwave and Optical Technology Lett., Vol. 50, no. 6, pp.1682-1685, June, 2008.

[69] S.-L. Jang, and C.-W. Chang, ” A 90nm CMOS LC-tank divide-by-3 injection-locked frequency divider with record locking range,” IEEE Microw. Wireless Compon. Lett., vol. 20, pp.229-231, April, 2010.

[70] S.-L. Jang, Y.-S. Chen, C.-W. Chang, and C.-C. Liu, ” A wide-locking range ÷3 injection-locked frequency divider using linear mixer,” IEEE Microw. Wireless Compon. Lett., vol. 20, pp.390-392, July, 2010.

[71] L.-H. Lu, H.-H. Hsieh, and Y.-T. Liao, “A wide-tuning-range CMOS VCO with a differential tunable active inductor,” IEEE Trans. Microw. Theory Tech., vol. 54, no.9, pp.3462-3468, Sept. 2006.

[72] H. Wu and L. Zhang, “A 16-to-18GHz 0.18μm epi-CMOS divide-by-3 injection-locked frequency divider,” in IEEE ISSCC Dig. Tech. Papers, Feb. 2006, pp.27–29.