低輸入電流漣波之全橋相移轉換器｜國立臺灣科技大學博碩士論文系統

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研究生：	馮恩福 Pitipong Sae-Foeng
論文名稱：	低輸入電流漣波之全橋相移轉換器 Low Input Current Ripple Phase-Shift Full-Bridge Converter
指導教授：	呂錦山 Ching-Shan Leu
口試委員:	邱煌仁 Huang-Jen Chiu 榮世良 Brady Jung 林端禮 Ray-Lee Lin 黃仲欽 Jong-Chin Hwang
學位類別：	碩士 Master
系所名稱：	電資學院 - 電機工程系 Department of Electrical Engineering
論文出版年：	2012
畢業學年度：	100
語文別：	英文
論文頁數：	91
中文關鍵詞：	降低電流漣波、零電壓切換、Taiwan Tech 全橋相移轉換器
外文關鍵詞：	current ripple reduction, zero-voltage switching, Taiwan Tech phase-shift full-bridge converter
相關次數：	點閱：302 下載：14
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上一筆

由於全橋相移電能轉換電路具有較低的開關電壓與電流應力、高效率以及定頻率的操作特性，因此被廣泛地應用於直流-直流電能轉換器。同時變壓器的漏感被有效地利用，一次側的開關得以操作在零電壓切換的操作條件，除了降低倒通時的切換損失，並因此消除外加緩衝電路的需求，使其適用於高輸入電壓和高功率電能轉換應用。
目前許多全橋相移電能轉換電路論文都提出如零電壓切換的範圍與滯留時間以及工作週期之損失等相關設計考量的準則，對其性能有完整的描述。但由於此一電路為由降壓型轉換器衍生的架構，具有脈衝式輸入電流特性，因此有較大的電流瞬時變動所造成的雜訊，迄今唯一的解決辦法為使用較大的EMI濾波元件，才能滿足電磁干擾（EMI）的規範。
近幾年來已有許多降低輸入電流漣波轉換器的論文被提出，因其具有降低輸入電流瞬時變動量的特性，也因此可以使用較小的EMI濾波器，因而降低了體積與成本。唯此一系列的電路，都是操作在硬切換模式，因此開關元件有較高的切換損失。
因此探討含有零電壓切換的全橋相移轉換器，並也能有低輸入電流漣波特性的電路，就成為本論文研究的動機。除了可以使用更小的濾波元件以符合EMI之規範外，還可有效提升整體的轉換效率。
本論文提出的低輸入電流漣波之全橋相移轉換器電路，針對包括零電壓切換的範圍、滯留時間、工作週期之損失以及輸入電流漣波等問題將被詳細探討。此外為進一步提昇性能，將採用電流漣波消除機制，取代了原先脈衝式的電流，使其輸入電流為連續的波形，也成為本論文的另一研究的重點。
除了理論的分析，模擬，本論文並以實作於70 kHz工作頻率，輸入電壓為300V到380V，輸出電壓為12V輸出功率360W的電路設計與驗證，提出低輸入電流漣波之全橋相移轉換電路及連續輸入電流之全橋相移轉換電路的性能及可行性。

The phase-shift full-bridge converter (PSFB) is widely used for the front-end dc-dc converter due to its essential advantages in low voltage and current stresses on the switches, high efficiency and fixed frequency operation. Moreover, it has several features, for instance, the incorporation of the leakage inductance of the transformer to achieve zero-voltage switching (ZVS) of the primary switches and the elimination of the need for the primary side snubbers enables it suitable for high input voltage and high power conversion applications. Several papers have been published to provide the solutions for the main criteria, such as the ZVS range, dead time, and duty cycle loss, in the design trade-off of the PSFB. Inheriting from the characteristic of the Buck converter, however, large di/dt noise is generated due to its pulsating input current waveform. To meet the EMI regulation, therefore, a larger EMI filter has to be added and becomes the only solution so far.
To alleviate the input current, di/dt, recently, several input current ripple reduction converters have been proposed in the literature. As a result, the EMI performance can be achieved by using smaller EMI filter components. It reduces the size and saves the cost from the conventional EMI filter design. However, these converters suffer from the high switching loss due to the hard-switching operation. Therefore, zero-voltage switching technique should be applied to enhance their performance. To explore a full-bridge converter with ZVS and reduced input current ripple properties becomes the motivation of this research and a phase-shift full-bridge with input ripple reduction converter (PSFBRR) is proposed. In addition to meet the EMI regulation with smaller filter components, the significant efficiency improvements can be achieved.
Including the ZVS range, dead time, and duty cycle loss, the issue of the input current ripple of the proposed PSFBRR is accompanied to be discussed in detail.
Moreover, the input current ripple can be further reduced by way of the current ripple cancellation mechanism. Thus, a phase-shift full-bridge converter with input ripple cancellation (PSFBRC) is also proposed to obtain a continuous input current waveform instead of the pulsating shape.
To demonstrate its feasibility, the operation principle and the hardware implementations of the proposed converters with 300~380V input and 12V/30A output are described in this thesis.

Abstract....................................................................I
Acknowledgement.............................................................III
Table of Content............................................................IV
List of Figures.............................................................VII
List of Table...............................................................XI
Chapter 1.	Introduction..............................................1
1.	Background and Motivation..........................................1
2.	Objectives of the Thesis...........................................4
3.	Organization of the Thesis.........................................4
Chapter 2.	Phase-Shift Full Bridge Converter with Current Ripple Reduction (PSFBRR)	..........................................................6
1.	Introduction.......................................................6
2.	Operational Principle..............................................7
3.	Circuit Analysis...................................................11
3.1.	Input Current Ripple Reduction.....................................11
3.2.	Zero Voltage Switching Range.......................................13
3.3.	Required Dead Time	.................................................14
3.4.	Duty Cycle Loss....................................................15
4.	Input Current Comparison of the PSFB and the PSFBRR................16
5.	Design Consideration Issues........................................17
5.1.	Zero Voltage Switching.............................................17
5.2.	Duty Cycle Loss....................................................18
5.3.	Input Current Ripple...............................................19
5.4.	Choice of ZVS Range, Duty Cycle Loss and Input Current Ripple......20
6.	Circuit Design.....................................................21
6.1.	Duty Cycle Range and Turns-Ratio n=Np/Ns...........................21
6.2.	Transformer TR.....................................................22
6.3.	Resonant Inductors L1, L2..........................................23
6.4.	Clamping Capacitor CC1.............................................23
6.5.	Output Inductor Lf	.................................................24
6.6.	Output Capacitor Cf................................................25
6.7.	Semiconductor Components...........................................25
7.	Simulation Results	.................................................26
8.	Experimental Results...............................................30
8.1.	Design Case I (Identical Resonant Inductance)......................32
8.2.	Design Case II (Unbalanced Resonant Inductance)....................35
9.	Summary............................................................39
Chapter 3.	Phase Shift Full Bridge Converter with Current Ripple Cancellation (PSFBRC).......................................................42
1.	Introduction.......................................................42
2.	Operational Principle..............................................44
3.	Circuit Analysis...................................................46
3.1.	Input Current Ripple Cancellation..................................46
3.2.	Zero Voltage Switching Range.......................................51
3.3.	Required Dead Time	.................................................52
3.4.	Duty Cycle Loss....................................................53
4.	Input Current Comparison of the PSFB, the PSFBRR and the PSFBRC....53
5.	Circuit Design.....................................................54
5.1.	Duty Cycle Range and Turns-Ratio n=Ns/Np...........................54
5.2.	Transformer TR.....................................................54
5.3.	Resonance Inductors L1, L2, L3, L4.................................56
5.4.	Clamping Capacitor CC1, CC2	........................................56
6.	Simulation Results	.................................................57
7.	Experimental Results...............................................61
8.	Summary............................................................69
Chapter 4.	Conclusions and Future Research...........................71
1.	Conclusions........................................................71
2.	Future Research....................................................72
Reference...................................................................73
Vita........................................................................78

                                

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