因應高速傳輸通訊的需求，如何增加通道頻寬與資料量已成為研發技術的重點，本論文為研發及模擬高速EML基板模組使其達50GBaud/s傳輸資料速率目標，首先根據本實驗室歷年來所建立出的EML等效電路模型進行修改，藉由調整EML等效電路內部的元件來優化頻寬，並針對放置EML晶片之傳輸線基板進行設計及討論。在EML基板模組傳輸PAM-4訊號的3-dB頻寬要求上，需符合頻寬35 GHz以上以讓訊號完整傳輸。本論文利用電路模擬系統ADS及3D電磁模擬軟體模擬信號完整度。
最後整合EML基板模組架構以進行模組頻寬的提升，本論文成功建立元件與基板模型，利用EML等效電路和打線之長度進行優化，與實際量測結果比較及分析。未來在完成EML基板製作以及與EML封裝後，可與量測結果進行比較驗證，透過反覆模擬及實驗驗證，可望達成符合規範的單通道50 Gbaud/s EML模組。

Increasing the channel bandwidth and data rates are the main focus of research and development in optical communication industry to meet the demands of high-speed optical transmission and interconnect. This thesis presents the design and simulation of 50-Gbaud/s submount for electro-absorption modulated lasers (EMLs) by modifying the EML equivalent circuit model based on the prior research of our lab. In order to optimize the EML bandwidth, we adjust the component values in the equivalent circuit model of an EML. Then, the transmission line model of the submount for the EML chip is designed and discussed. To transmit 50 Gbaud/s PAM-4 signals, the 3-dB bandwidth of the EML transmitter needs to be above 35 GHz in order to transmit the major signal spectrum.
In this work, we use the PathWave Advanced Design System (ADS) and 3-D electromagnetic simulation software (HFSS) to co-simulate the EML and its submount to assure sufficient bandwidth for transmitting high-speed signals. The EML submount is simulated to provide enough bandwidth for the EMLs. The optimization is conducted by tuning the EML model and the length of the bondwire as well as by improving the S-parameters of an EML submount. The device modeling of EMLs and submounts can be verified and fine-tuned to finally achieve the 50 Gbaud/s data rate by comparing the measurement results and the simulations.

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