本論文主要研究伺服器電路板上的降壓型直流-直流轉換器(DC-DC buck converter)，也就是電壓調節模組(Voltage Regulator Module, VRM)在開關切換時產生的高頻電源切換雜訊(Switching Power Noise)。此雜訊會耦合至鄰近電路甚至汙染電源輸送網路(Power Delivery Network, PDN)，使整個系統電路的電源完整性(Power integrity, PI)受到影響。本文分析電源切換雜訊生成原理，利用RLC串聯諧振等效瞬時電壓雜訊(dv/dt noise)，並且使用分段式線性電流源(Piecewise linear current source)來模擬瞬時電流雜訊(di/dt noise)波形。將本論文提出的電路模型與廠商提供電晶體的SPICE(Simulation Program with Integrated Circuit Emphasis)電路比較，瞬時電流雜訊有低於10%的誤差比，而瞬時電壓雜訊有低於1%的誤差比。在量測與模擬比較上，本論文之雜訊電路與實作兩種不同電源遞送路徑的瞬時電壓雜訊誤差比皆為10%，兩者都有相當不錯的吻合度。

This thesis mainly studies the high-frequency switching power noise during the DC-DC buck converter, also known as voltage regulator module (VRM), switching on the server board. The noise coupling from VRMs to nearby circuits and even to the power delivery network (PDN) can cause severe power integrity (PI) problems because of the switching power noise. In this research, the switching power noise mechanism is analyzed and distinguished into two types of noise source, which are dv/dt noise and di/dt noise. The concept of dv/dt noise is equivalent to RLC series resonance and the waveform of di/dt noise can be described by a piecewise linear current source. The comparisons between the architecture this thesis proposed and the MOSFETs SPICE model provided by the VR vendor present good noise modeling results. Di/dt noise error ratio is less than 10% and dv/dt noise error ratio is below 1%. In addition, there are good correlations between the simulation results of the proposed noise circuit and the measurement results of two different power rail conditions. Both dv/dt noise error ratios are about 10%.

[1] W. Mao, J. He, E. Standford, YL Li, “Study of Voltage Regulator Noise Characterization, Coupling Scheme and Simulation Method,” IEEE 19th Conference on Electrical Performance of Electronic Packaging and Systems, Austin, TX, USA, 2010, pp.201-204.
[2] Amy Luoh, Gene Garrison, Jon Powell, “Switching Voltage Regulator Noise Coupling Analysis for Printed Circuit Board Systems,” DesignCon 2009.
[3] Amy Luoh, et al., “Methods for Discovering and Mitigating Switching Regulator Noise Coupling for Complex PCB System,” DesignCon 2011.
[4] Laura Kocubinski, Gustavo Blando, Istvan Novak, “Mid-Frequency Noise Coupling between DC-DC Converters and High-Speed Signals,” DesignCon 2016.
[5] A. Bhargava, D. Pommereneke, and K. Kam, “EMI Prediction in switched power supplies by full-wave and non-linear circuit co-simulation,” in Proc. IEEE Int. Symp. Electromagn. Compat. Austin, TX, 17–21 Aug. 2009, pp. 41–46.
[6] 梁適安（2008）。交換式電源供給器之理論與實務設計。臺北縣：全華圖書。
[7] M. Swaminathan, and E. Engin, Power Integrity Modeling and Design for Semiconductors and Systems, Prentice Hall, 2007.
[8] Texas Instruments Incorporated, Switching Regulator Fundamentals, SNVA559A–September 2012–Revised September 2016.
[9] Ejury Jens, “Buck Converter: Negative Spike at Phase Node,” Infineon Technologies Austria AG 9500 Villach, Austria, February 2011.
[10] G. Ouyang, X. Ye, and T. Nguyen, “Switching voltage regulator noise coupling to signal lines in a server system,” Proc. IEEE Int’l Symp. Electromagnetic Compatibility Conf., pp.72-78, Jul. 2010.
[11] W. Songping, K. Keong, D. Pommerenke, B. Cornelius, S. Hao, M. Herndon, et al., “Investigation of noise coupling from switching power supply to signal nets,” in Electromagnetic Compatibility (EMC), 2010 IEEE International Symposium on, 2010, pp. 79-84.
[12] J. Fan, M. Cocchini, B. Archambeault, J. L. Knighten, J. L. Drewniak, and S. Conner, “Noise coupling between signal and power/ground nets due to signal vias transitioning through power/ground plane pair,” IEEE International Symposium on Electromagnetic Compatibility, Detroit, MI, August 18–22, 2008.
[13] Istvan Novak, et al., “TecForum 11-MP2: Dynamic Characterization of DC-DC Converters,” DesignCon 2012.
[14] Steven M. Sandler, “Measurement Based VRM Modeling,” IEEE 21st Workshop on Signal and Power Integrity (SPI), 2017.
[15] Yang Wu, Zhongfu Ji, Jiang Wang, Wenbin Ma, “Noise Coupling Analysis for High Speed Differential Trace Crossing Switching Voltage Regulator Area,” IEEE International Symposium on Electromagnetic Compatibility and IEEE Asia-Pacific Symposium on Electromagnetic Compatibility (EMC/APEMC), 2018.
[16] J. Kim, M. D. Rotaru, S. Baek, J. Park, M. K. Iyer, M. K. , and J. Kim, “Analysis of noise coupling from a power distribution network to signal traces in high-speed multilayer printed circuit boards,” IEEE Trans. Electromagn. Compat., vol. 48, no. 2, pp. 319–330, May 2006.
[17] M. Cocchini, et al., “Noise coupling between power/ground nets due to differential vias transitions in a multilayer PCB,” in Proc. IEEE Int. Symp. Electromagn. Compat., Aug. 2008, pp. 1–6.
[18] Richard Sjiariel, “Power Integrity Simulation of Power Delivery Network System,” IEEE 19th Workshop on Signal and Power Integrity (SPI), 2015.
[19] H. Kim, B. Achkir, J. Kim, C. Yoon, and J. Fan, “On-chip voltage regulator module (VRM) effect on power/ground noise and jitter at highspeed output buffer,” in Proc. IEEE Int. Symp. Electromagn. Compat., Raleigh, NC, USA, Aug. 2014, pp. 75–80.
[20] Jinbin Zhao, “A Novel ZVS Buck Converter Topology for VRM Applications,” IEEE 6th Conference on Industrial Electronics and Applications, 2011.
[21] K. W. Kam and D. Pommerenke, “EMI analysis methods for synchronous buck converter EMI root cause analysis,” in Proc. IEEE Int. Symp. Electromagn. Compat. Detroit, MI, 18–22 Aug. 2008, pp. 1–7.
[22] Zhe Li and D. Pommerenke, “EMI specifics of synchronous DC-DC buck converters,” 2005 International Symposium on Electromagnetic Compatibility, 2005, pp. 711-714 Vol. 3.
[23] Q. Zhao and G. Stojcic, “Characterization of Cdv/dt induced power loss in synchronous buck DC-DC converters,” in Applied Power Electronics Conference and Exposition, 2004. APEC '04. Nineteenth Annual IEEE, 2004, pp. 292-297 Vol.1.
[24] Y. Ren, W. Shen, K. Xiao, “VR noise analysis and reduction in printed circuit board designs,” IEEE International Symposium on Electromagnetic Compatibility (EMC), 2014.
[25] K. Kam, D. Pommerenke, F. Centola, C. W. Lam, and R. Steinfeld, “EMC guideline for synchronous buck converter design,” in Proc. IEEE Int. Symp. EMC, 2009, pp. 47–52.
[26] Ankit Bhargava, David Pommerenke, Keong W. Kam, Federico Centola, Cheng Wei Lam, “DC-DC Buck Converter EMI Reduction Using PCB Layout Modification,” Electromagnetic Compatibility IEEE Transactions on, vol. 53, no. 3, pp. 806-813, 2011.
[27] G. Ouyang, K. Xiao, W. Xu, J. He, J. Fang, G. Tian, X. Ye, et al, “Switching voltage regulator noise coupling to connector signal pins through near field radiation,” IEEE International Symposium on Electromagnetic Compatibility (EMC), 2014.
[28] P. Shao, F. Chang, C. Reade, P. Ilavarasan, D. Pommerenke, “Finding return current paths via synchronized measurements in a multiphase DCDC buck converters,” IEEE EMC Symposium, 2009.