本研究主要應用SOPC(System-on-a-programmable-chip)技術發展影像循邊量測系統，在影像循邊量測系統的晶片內，包含硬體及軟體兩大部分。
硬體部分包含：(1)影像擷取電路：擷取CMOS(Complementary metal-oxide-semiconductor)影像感測器之訊號。(2)規劃Nios II微處理器：作為影像循邊量測程序運行的平台。
軟體部分(Nios II 微處理器)包含：(1)I2C(Inter-integrated circuit)串列通訊介面：利用Nios II的PIO(Parallel input/output)完成寫入CMOS影像感測器的暫存器之功能。(2)影像循邊處理演算法：搭配所設計的影像擷取硬體電路，對所擷取的影像資料進行處理，其流程為：影像還原、灰階化、低通濾波、Otsu門檻值決定法、二值化、Laplacian operator 測邊、細化、去毛邊、八連通循邊及次像素定位。(3)待測物件參數演算法：利用所循得的邊點資訊，來求得該物件之相關參數，待測物件包含：圓、橢圓、平行四邊形及三角形物件，而對於其他物件可求得其最小外接矩形參數。
在系統晶片內之硬體部分使用Verilog 硬體描述語言撰寫；軟體部分使用C 程式語言撰寫，系統晶片採用美商ALTERA 公司生產的Stratix II EP2S60F672C3N FPGA(Field-programmable gate array)，CMOS影像感測器採用國內PIXART公司所生產的PAS6311LT彩色影像感測器，此感測器為解析度為648×488，最後，本論文整合一套系統，包括Nios II 發展板、三軸平行機構和CMOS影像感測器等，經由實驗結果之比較來驗證本文所設計的系統晶片之有效性與正確性。

An edge tracing measurement integrated circuit (IC) using System-on-a-programmable-chip (SOPC) technology is presented in this thesis. In the proposed measurement IC, there are two modules. One module is implemented by hardware circuit, which functions are Complementary metal-oxide-semiconductor (CMOS) image sensor signal capture and scheme Nios II microprocessor. The other module is implemented by software using Nios II microprocessor, which functions are writing registers of CMOS image sensor using Inter-integrated circuit (I2C) and the edge tracing measurement algorithm, such as Otsu’s method, Laplacian operator, thinning, chain code, subpixel theorem and so on. The digital hardware circuits are designed by Verilog language and programed in Nios II microprocessor coded in C language. The Field-programmable gate array (FPGA) chip adopts ALTERA Stratix II EP2S60F672C3N on the development board. The CMOS color image sensor adopts PIXART PAS6311LT which resolution is 648×488 pixels. At last, an integrated experimental system that includes Nios II development board, three degree of freedom parallel mechanism and CMOS image sensor is implemented. The experimental results verify the feasibility and correctness of the proposed measurement system.

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