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研究生: 阿里福
Arief Noor Rahman
論文名稱: 用於三相轉換器之改良型時間平均模型
Modified Time Average Model for Three-Phase Converter Applications
指導教授: 邱煌仁
Huang-Jen Chiu
口試委員: 陳耀銘
Yaow-Ming Chen
劉邦榮
Pang-Jung Liu
林長華
Chang-Hua Lin
連國龍
Kuo-Lung Lian
學位類別: 博士
Doctor
系所名稱: 電資學院 - 電子工程系
Department of Electronic and Computer Engineering
論文出版年: 2021
畢業學年度: 109
語文別: 英文
論文頁數: 64
中文關鍵詞: 時間平均模型關於三相電壓源轉換器三相主動濾波器
外文關鍵詞: time average model, three phase voltage source converter, three phase active rectifier
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關於三相電壓源轉換器 (Voltage Source Converters, VSC) 的研究通常都會使用模擬進行驗證,在模擬中開關元件會使用精確的開關元件模型 (Switching Element Model, SEM)。這種模擬方式可以深入分析實際電路的運作行為。VSC的實際電路在上臂開關與下臂開關的控制訊號中加入死區時間 (dead-time) 以確保電路運作的可靠度,但是死區時間會造成一些不利的影響,例如VSC的輸出電壓降低與零交越電流箝位。為了使用SEM精確的模擬VSC與死區時間的影響必須使用非常小的時間步驟(time-step),這將會造成運算時間增加。本文使用時間平均模型 (Time Average Model, TAM) 進行VSC的模擬,並提出一種非理想模型模擬死區時間對於整個波形的影響,亦加入絕緣柵雙極性電晶體 (Insulated Gate Bipolar Transistor, IGBT) 中飛輪二極體 (freewheeling diodes) 的順向導通電壓進一步改善波形。除此之外,傳統TAM模型無法操作在全範圍,本文實現關閉狀態模型 (off-state model) 使得TAM模型能夠操作在全範圍。本文針對SEM模型與TAM使用MATLAB-Simulink 進行模擬,使VSC操作在三相主動濾波器 (three phase active rectifier),也稱為功率因素修正器 (Power Factor Correction PFC)。將SEM模型與TAM模型的模擬結果與實際電路的測量結果進行比較,以驗證所提出的非理想模型之性能。


Typically, the study of a three phase voltage source converters (VSC) are conducted on a simulation where the switching devices are modeled as detailed switching element model (SEM). Such simulation approach provides good insight of the behavior from the implemented hardware. Hardware VSC uses dead-time between the upper and lower switches to ensure reliable operation. Nevertheless, dead-time causes a few downsides such as reduction of effective VSC output and zero-crossing current clamping. To accurately simulate a VSC with SEM and also capturing the dead-time effects, very small simulation time-step is necessary. Where it resulting in long computation time. In this study, time average model (TAM) is employed for VSC simulation and a distortion model is proposed to emulate the dead-time effect on the overall waveform. Furthermore, the forward voltage drops of IGBT and freewheeling diodes were added to improve the waveform further. Additionally, off-state model is also implemented to allow full operation range of TAM that has been previously not possible. A simulation in Simulink was developed for both SEM and TAM models. In this study, the VSC was operated as three phase active rectifier or also called power factor correction (PFC). The result from SEM and TAM simulations are compared with the actual hardware measurement to validate the performance of proposed distortion model.

Table of Contents Abstract ii Acknowledgement iii Table of Contents iv List of Figures vi Chapter 1. Introduction 1 1.1. Research Motivation 1 1.2. Thesis Scope and Limitation 4 1.3. Thesis Structure 5 Chapter 2. Simulation Modeling Approaches for VSC 7 2.1. Switching Element Model 7 2.2. Time Average Model 9 Chapter 3. Dead-time Induced Distortion on VSC 11 3.1. Dead-time Implementation on VSC 11 3.2. Dead-time Induced Low Frequency Distortion on VSC Waveforms 12 Chapter 4. Proposed Distortion Modeling Technique for TAM 15 4.1. Five Level Dead-Time Distortion Approximation 15 4.2. Peak-to-peak ripple current approximation. 18 4.3. Auxiliary VSC Circuit Model 20 4.4. Implementation of Combined Distortion Model 21 Chapter 5. Inner and Outer Loop Controller Design for VSC 24 5.1. Controller Structure and System Simplification 24 5.2. Inner Current Loop Modeling 25 5.3. Outer Voltage Loop Modeling 27 5.4. Discrete Time Proportional Integral Controller model 28 5.5. Overall Control System Loop Structure 30 5.6. Current Loop Tuning 32 5.7. Voltage Loop Tuning 34 5.8. PWM Technique 34 5.9. Direct Decoupled Synchronous Reference Frame – Phase Lock Loop 36 Chapter 6. Experimental Result and Discussion 38 6.1. Circuit parameters and hardware implementation 38 6.2. Case I: Open loop circuit test with passive load 40 6.3. Case II: PFC close loop test (SEM vs TAMs) 42 6.4. Case III: PFC close loop circuit test (Experimental vs SEM vs 5L-DA) 47 6.5. Performance summary of TAM and SEM 52 Chapter 7. Conclusions and Potential Future Application 53 References 54 Appendix 1 56

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