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研究生: 周家宏
Chia-Hung Chou
論文名稱: 暫存器New-Old Banks機制產生程式碼
Code Generation for Register File with New-Old Banks
指導教授: 黃元欣
Yuan-Shin Hwang
口試委員: 張榮貴
Rong-Guey Chang
謝仁偉
Jen-Wei Hsieh
學位類別: 碩士
Master
系所名稱: 電資學院 - 資訊工程系
Department of Computer Science and Information Engineering
論文出版年: 2012
畢業學年度: 101
語文別: 中文
論文頁數: 46
中文關鍵詞: 編譯器暫存器程式碼生成
外文關鍵詞: Compiler, Register, Code Generation
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在本篇論文中,我們提出了New-Old Register Banks的機制,藉此來增加指令集中所可以使用的實體暫存器數量,使得編譯器或是程式設計師可以使用更多的暫存器來提高程式的效能,在這個方法中,僅利用原始的指令格式配合Register Allocation來達到增加暫存器的目的,並不會因此在格式中增加額外的位元。此方法中,我們將Alpha micro-processor內的暫存器增加8倍,由原本的32顆暫存器增加到256顆暫存器,讓32位元的指令可以不受位元的限制,而使用到更多的暫存器,同時編譯器及程式設計師透過存取這256顆暫存器來提高效能。
此方法中,除了需要一個New-Old Register Banks的Code Generation演算法來對應我們所修改的指令格式外,同時還需要在硬體的部分配合New到Old暫存器搬移的動作,使整個程式可以有效率的利用額外增加的暫存器,以達到提升效能的目的。


We proposed a code generation method with old-new register banks – “Code Generation for Register File with New-Old Banks”. This scheme significantly increasing the number of register which can encode 4x~8x registers with same encoding space. The Compiler can do more aggressive optimization to improve the performance of program, if we have more registers. We use the traditional graph-coloring based register allocation with 2-address format and eliminate move instruction which saves old value of a register. Then we modify hardware to handle old-new value of registers.
We proposed a We proposed a code generation method with old-new register banks to increase physical registers of a processor. In this method, a compiler or a programmer can use more registers to improve performance. We use traditional graph-coloring based register allocation with 2 address format to increase registers, so we increase registers from 32 to 256. It won’t increase extra bits in format in this method. And we need a code generation algorithm to generate code corresponding to our instruction format and we need to modify hardware to handle new-old register. Therefore, we can use extra registers and improve performance.

論文摘要 1 Abstract 2 致謝3 第一章 序論 7 1.1 研究動機 7 1.2 研究目的 8 1.3 研究方法 8 1.4 論文架構 9 第二章 文獻探討 10 2.1 微處理器硬體架構 10 2.2 暫存器增加文獻 12 2.2.1 Differential Register Encoding 12 2.2.2 Paired-Register Allocation 13 2.3 REGISTER ALLOCATION相關演算法 14 第三章 研究方法 17 3.1 設計概念 17 3.2 暫存器編碼 19 3.2.1 2-Address Register Encoding 19 3.2.2 New-Old Register Encoding 19 3.3 指令編碼格式 21 3.4 2-ADDRESS REGISTERS V.S. NEW-OLD REGISTERS 24 3.5 NEW-OLD REGISTER BANKS實作 26 3.5.1 New-Old Register Banks演算法 26 3.5.2 New-Old Register Encoding Format 31 3.5.3 New-Old Register Banks硬體實作 32 第四章 實驗結果 37 4.1 實驗平台 37 4.2 效能評估 37 第五章 結論與未來展望 43 5.1 結論 43 5.2 未來展望 43 參考文獻 44

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