現今，因資料密集性的應用，有著越來越多的矽智財被整合至SoC設計中。然而，傳統匯流排架構可能無法提供足夠的頻寬、延遲時間以及平行性。晶片網路源自於大型電腦網路的概念，是種新興的設計範式。其提供高頻寬、低延遲時間、彈性的可擴展性以及平行計算。晶片網路卻也為測試帶來新的挑戰。為了克服貧乏的控制性以及觀測性問題，文中提出適用於網狀晶片內路由器之功能性測試策略。其包含IP路徑測試，直線路徑測試以及轉向路徑測試。提議的測試策略對於FIFOs以及每個路由器中二十種路徑功能，可達到100% 單一錯誤涵蓋率。透過提議的測試配置，可以被判斷錯誤的位置。文中實現了其它可測試性技術做為比較。結果顯示提議的策略只需4%硬體成本並且只需要2種測試資料來測試錯誤。測試時間較其他測試方式短。與不同的功能性測試技術的比較也呈現文中。雖然，提議的功能測試技術是依照於路由架構而提出，依然可以做為評估。提議的測試策略達到100%錯誤涵蓋率，高於其他功能性測試方法。

Today, there are more and more IP cores integrated into SoC for data-intensive applications. However, traditional bus-based architecture may not provide enough bandwidth, latency, and parallelism. Network-on-Chips are emerging design paradigms derived from large computer network. They provide high bandwidth, low latency, flexible scalability and parallel computing. But they also bring new challenges for testing. In order to overcome the problem of poor controllability and observability of NoCs, we proposed the functional test strategies for routers in mesh-based NoCs. They are the testing of IP paths, straight paths, and turning paths. Proposed test strategies can target 100% SAFs for FIFO and twenty routing functions of each router. By proposed test configurations, the location of faults also can be distinguished. We also implement other methods for comparison. The results shows that the proposed strategies only take 4% hardware overhead and two test patterns to target the faults. The test time is also shorter than other methods. The comparisons of different functional testing are also shown. Although the functional testing depends on the router architectures, the comparisons are still provided for evaluation. The proposed test strategies can target 100% fault coverage much higher than other functional test method.

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