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研究生: 馬瑞拉
Rella - Mareta
論文名稱: 可消除高階梯度誤差之高精度多重元件匹配佈局
High-Accuracy Multiple-Device Matching Layout for High-Order Gradient Cancellation
指導教授: 陳伯奇
Poki Chen
口試委員: 楊清淵
Ching-yuan Yang
陳信樹
Hsin-shu Chen
李泰成
Tai-cheng Lee
鍾勇輝
Yung-hui Chung
學位類別: 碩士
Master
系所名稱: 電資學院 - 電子工程系
Department of Electronic and Computer Engineering
論文出版年: 2014
畢業學年度: 102
語文別: 英文
論文頁數: 117
中文關鍵詞: 佈局圖形多重元件匹配系統性不匹配梯度誤差對稱鏡射反對稱鏡射
外文關鍵詞: Layout pattern, multiple-device matching, systematic mismatch, gradient error, symmetrical mirroring, anti-symmetrical mirroring
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  • 本論文提供以多重元件匹配之高階梯度誤差消除的能力,來建構佈局模式的方法。此方法可以消除任意數量元件的任意階梯度誤差,而且透過此方法,佈局工程師將有更大的自由度,依據其創新和電路準確度,來選擇佈局模式。本論文提出了五種可消除線性梯度的多元件同重心佈局, 在此基礎上可透過對稱鏡射和反對稱鏡射構建可消除更高階梯度的佈局。此外,所有的佈局模式已藉由數學推導和MATLAB模擬,證實可以消除梯度誤差。本電路四電流源匹配是以台積電 0.35μm的製程實現。量測後的結果顯示出,提出的佈局模式能達到更佳的元件匹配,且驗證了提出的方法是有效的


    This Thesis provides general methodology to construct layout patterns for multiple-device matching with high order gradient cancellation capability. The methodologies help to construct any number of devices for any order gradient cancellation. Furthermore, layout engineers will have more degree of freedom to choose layout pattern according to their innovation or circuit precision. Five terms of common centroid pattern for multiple-device are also presented here. They have the capability of linear gradient cancellation. To construct higher order gradient cancellation, we should apply either symmetrical or anti-symmetrical mirroring based on our proposed rules. Moreover, all layout patterns have been verified in mathematical analysis and MATLAB simulations to ensure the capability of gradient cancellation. A test chip for 4-current source matching is implemented in a 0.35 μm TSMC technology. The measurement results show that the proposed layout patterns achieve better matching performance than conventional ones, and the usefulness of these proposed methodologies are also verifie

    摘要 i Abstract iii Acknowledgement v Table of Contents vii List of Figures ix List of Tables xi Chapter 1 Introduction 1 1.1 Introduction 1 1.2 Motivation 2 1.3 Overview of This Thesis 2 Chapter 2 Mismatch and Two-Device Matching Layout 5 2.1 Mismatch 5 2.1.1 Random Mismatch 6 2.2.2 Systematic Mismatch 8 2.2 Gradient Error Modeling 9 2.3 Two-Device Matching Patterns 11 2.3.1 Common Centroid 11 2.3.2 Higher-order Gradient Error Cancelation 14 Chapter 3 The Proposed Method for Multi-Device Matching Layout Pattern 19 3.1 Symmetrical and Anti-symmetrical Mirroring 20 3.2 The General Rules for Multi-Device Matching Layout Pattern 22 3.2.1 The First-Order Gradient Cancellation Patterns 23 3.2.2 Second-Order Gradient Cancellation Patterns 29 3.2.3 Third-Order Patterns 40 3.2.3 Fourth-Order Patterns 49 3.3 Verification of The Proposed Rules for Two-device Matching Patterns 57 Chapter 4 Mismatch Simulation 65 4.1 Simulation of Two-Device Matched Patterns 65 4.2 Simulation of Multiple-Device Matching Patterns 68 Chapter 5 Layout Implementation and Measurement 81 5.1 Design and Implementation 81 5.2 Chip Measurement Results 85 Chapter 6 Conclusion and Future Research 89 6.1 Conclusion 89 6.2 Future Research 89 References 91

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