本論文共有獨立之兩部分研究。第一部分，吾人提出「極簡式非耦合巴倫器」之創新構想，係以電路匹配之構想出發，搭配平衡端之巧妙電路佈局規劃，大幅降低電路複雜度，僅需單一電感器即可進行完成設計，本設計可有效地縮小巴倫器所需佔用之面積，更能降低額外傳輸損耗，實現電路微型化、低傳輸損耗及降低設計成本、並成功將其實現於印刷電路板與被動整合元件製程，其操作頻帶涵蓋UHF至K波段。吾人更將此極簡式非耦合式巴倫器與平衡偶極天線進行整合設計，藉由天線整合應用，驗證本設計可直接針對前、後級電路之複數輸出入阻抗進行單端-差動訊號之轉換。
本論文之第二部分，則延續前人「二維週期性合成傳輸線」之基礎，於IPD製程提出一新式電路單元佈局，實現二維週期性合成傳輸線之晶片整合設計，該二維週期性合成傳輸線可於晶片空間內進行任意佈局，實現電路微小化、高佈局密度之設計，本論文據此成功完成多款晶片化之二維週期性合成傳輸線。最後，吾人更進一步運用二維週期性合成傳輸線實現晶片化枝幹耦合器、鼠競耦合器以及威爾京森分波器等被動射頻電路，成功達到縮小電路尺寸之目的，且於操作頻帶內具良好之電氣響應。

This thesis consisits of two independent researches. The first part investigates a novel idea for realizing baluns with very simple architecture and design methodology. The way the port connections makes the balun function no more than a routine matching network, in which all kinds of matching techniques can be applied to transform the complex loads. To minimize the design complexity, an L-section network is incorporated to give rise to the so-called “minimal non-coupling balun”. In this thesis, three minimal baluns implemented on PCB and IPD processes are introduced. All designs are developed based on a single inductor without any coupling scheme. The PCB and on-chip examples are respectively developed at the UHF, C- and K- bands. Very compact size, low power dissipation and acceptable output balance are observed. The concept is further verified by a balance antenna integrated with the minimal balun with arbitrary complex load impedances.
The second part of this thesis, based on the concept of two-dimensional periodic synthesized transmission line, proposes a new unit cell on the IPD process. Benefitting from the square footprint and symmetrical arrangement of the proposed unit cell, the two-dimensional synthesized line exhibits extraordinary flexibility in layout arrangement within a given space. On-chip branch-line coupler, rat-race coupler and Wilkinson power divider are developed by the two-dimensional synthesized line with not only a substantial miniaturization ratio but comparable circuit performances.

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