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研究生: 徐智遠
Chih-yuan Hsu
論文名稱: DRAM模組廠SMT線排程問題之研究
A Case Study of SMT Line Scheduling Problems for DRAM Module Plant
指導教授: 周碩彥
Shuo-Yan Chou
口試委員: 楊文鐸
Wen-Dwo Yang
陳振明
Jen-Ming Chen
學位類別: 碩士
Master
系所名稱: 管理學院 - 工業管理系
Department of Industrial Management
論文出版年: 2006
畢業學年度: 94
語文別: 英文
論文頁數: 33
中文關鍵詞: DRAM模組表面黏著技術生產線混整數規劃非等效平行機台順序相依整備時間準時交貨
外文關鍵詞: DRAM module, surface mount technology (SMT) lines, mixed integer programming (MIP), unrelated parallel machines, sequence-dependent setup times, on-time delivery
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  • 台灣DRAM模組產業近年來在高科技發展中扮演很重要的角色,它也是台灣電子產業最重要的銷售產品。由於DRAM市場價格劇烈的波動以及顧客對訂單需求的彈性、低價與快速準時達交,使得DRAM模組產業的排程規劃問題成為一項重要的議題。
    本研究致力於DRAM模組產業的排程規劃問題,且考慮順序相依整備時間之非等效平行機台下的準時交貨條件,建立DRAM模組個案公司表面黏著技術組裝線的數學規劃模式,並以線性規劃軟體LINGO求解個案公司的相關問題,藉此處理個案公司實際上的排程問題。
    本研究主要目標在於找出最佳的準時交貨狀況,決定出一個最具效益之訂單處理順序,我們提供這些結果作為個案公司排程時的參考,希望個案公司能夠透過此方法讓排程更有效地,以及增加製造設備的利用率。


    In recent years, the DRAM module industry has played a very significant role in the process of modern technology development in Taiwan. It’s also the most important selling product of Taiwan’s electronics industry. However, the DRAM price is quite influenced by the dynamic and instant nature of supply and demand in DRAM market. Additionally, customers always demand the most flexible, lowest price, and fastest delivery time to orders. Therefore, the scheduling planning problem is a main topic for DRAM module industry to satisfy all kinds of customers’ needs.
    This research presents a scheduling planning problem for unrelated parallel machines with sequence-dependent setup times and on-time delivery in DRAM module industry. In particular, the research will focus on building a mathematical formulation model to fit practical problems of the surface mount technology (SMT) assembly lines in DRAM module case company. Moreover, we will solve the model by linear programming software LINGO in small problem of case study.
    In this research, the major objective is to find out the optimal on-time delivery with minimum penalties. It means that the scheduling model will determine the manufacturing sequences of work orders with minimum earliness and tardiness penalties. We expect to provide it as reference for the scheduling of case company. It is also hope that the case company can arrange the manufacturing scheduling effectively and improve the utility rates of manufacturing equipment.

    Abstract I Acknowledgements II Content III List of Figures IV List of Tables V Chapter 1 Introduction 1 1.1 Motivation and Background 1 1.2 Objective 2 1.3 Methodology 2 1.4 Organization of Thesis 3 Chapter 2 Literature Review 4 2.1 SMT Line Scheduling 4 2.2 Unrelated Parallel Machines 5 2.3 Sequence-Dependent Setup Times 6 2.4 On-Time Delivery 9 Chapter 3 Case Company Description 11 3.1 An Overview of DRAM Module Industry 11 3.2 The Case Company Background and Production Process 12 3.3 The Characteristics of the SMT Scheduling in Case Company 14 Chapter 4 Problem Modeling 17 4.1 Problem Statement 17 4.2 A Mixed Integer Programming Model 19 4.3 Case Study 22 Chapter 5 Conclusion 29 Reference 31

    [1] Rabadi, G.., Moraga, R.J., Al-Salem, A. (2006) Heuristics for the unrelated parallel machine scheduling problem with setup times. Journal of Intelligent Manufacturing, 17(1), 85-97.
    [2] Biskup, D., Feldmann, M. (2001) Benchmarks for scheduling on a single machine against restrictive and unrestrictive common due dates. Computers and Operations Research, 28(8), 787-801.
    [3] Pinedo, M. (2002) Scheduling: Theory, Algorithms, and Systems, 2nd edition, Printce Hall, New Jersey
    [4] Liaw, C., Lin, Y., Cheng, C., Chen, M. (2003) Scheduling unrelated parallel machines to minimize total weighted Tardiness. Computers & Operations Research, 30, 1777-1789.
    [5] Kurz, M. E., Askin, R. G.. (2001) Heuristic scheduling of parallel machines with sequence-dependent set-uptimes. International Journal of Production Research, 39, 3747–3769.
    [6] Radhakrishnan, S., Ventura, J. A. (2000) Simulated annealing for parallel machine scheduling with earliness/tardiness penalties and sequence-dependent set-up times. International Journal of Production Research, 38, 2233–2252.
    [7] Weng, M.X., Lu, J., Ren, H. (2001) Unrelated parallel machine scheduling with setup consideration and a total weighted completion time objective. International Journal of Production Economics, 70(3), 215-226.
    [8] Garcia, J.M., Lozano, S. (2005) Production and delivery scheduling problem with time windows. Computers and Industrial Engineering, 48(4), 733-742.
    [9] Gen, M., Cheng, R. (1997) Genetic Algorithms and Engineering Design, John Wiley & Sons, New York.
    [10] Tsang, E.P.K. (1993) Foundations of Constraint Satisfaction, Academic Press, London, San Diego.
    [11] Ghrayeb, O.A., Phojanamongkolkij, N., Finch, P.R. (2003) A mathematical model and heuristic procedure to schedule printed circuit packs on sequencers. International Journal of Production Research, 41, 3849–3860.
    [12] Al-Fawzan, M.A., Al-Sultan, K.S. (2002) A tabu search based algorithm for minimizing the number of tool switches on a flexible machine. Computers and Industrial Engineering, 44, 35–47.
    [13] Ahmadi, J., Ahmadi, R., Matsuo, H., Tirupati, D. (1995) Component fixture positioning/sequencing for printed circuit board assembly with concurrent operations. Operations Research, 43, 444-457.
    [14] Kumar, R., Li, H. (1995) Integer programming approach to printed circuit board assembly. IEEE Transactions on Computers and Packaging, Manufacturing Technology, B18, 720-727.
    [15] Mainmon, O., Shtub, A. (1991) Grouping method for printed circuit board assembly. International Journal of Production Research, 29, 1379-1390.
    [16] Jain, A., Johnson, M.E., Safai, F. (1996) Implementation of setup optimization on the shop floor. Operations Research, 44, 843-851.
    [17] Balakrishnan, A., Vanderbeck, F. (1999) A tactical planning model for mixed-model electronics assembly operations. Operations Research, 47, 395-409.
    [18] Chen, M., Dong, Y. (1999) Applications of neural networks to solving SMT scheduling problems - a case study. International Journal of Production Research, 37(17), 4007-4020.
    [19] Van Hop, N., Nagarur, N.N. (2004) The scheduling problem of PCBs for multiple non-identical parallel machines. European Journal of Operational Research, 158 (3), 577-594.
    [20] Ho, W., Ji, P. (2003) Component scheduling for chip shooter machines: A hybrid genetic algorithm approach. Computers and Operations Research, 30(14), 2175-2189.
    [21] Xu, Z., Carlson, K., Kurschner, R., Li, Y.-A., Randhawa, S. (1998) Integrated methodology for surface mount PCB configuration. Computers and Industrial Engineering, 35(1-2), 53-56.

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