隨著科技發展，對於高頻的需求與日俱增，處理高頻訊號的電路也更加重要，而其中的 VCO 和注入鎖定除頻器(ILFD)尤為重要，且能量耗損也特別的大，其中電感更是不可或缺的被動元件，所以對於性能的要求也更加嚴苛，像是更寬的工作範圍、低雜訊、低功率，或是多功能的特性，所以本篇論文提出兩篇的 ILFD以及一篇電感性能比較的設計，所有的晶片都是使用 tsmc 0.18-μm CMOS mixed-signal and RF 1P6M technology 工藝製造。
第一部分介紹了一種 CMOS 4n 注入鎖定除頻器 (ILFD)，它帶有一個除 4 環形振盪除頻器，該除頻器堆疊在具有除整數 n 的電容性的交叉耦合 LC ILFD 上。除 12 鎖定範圍為 8.2GHz 至 10.2GHz，功耗為 12.86mW，外部注入信號功率 Pinj為 0dBm。無變容器除 12 ILFD 採用寬鎖定範圍的環形振盪器 FD 追踪來自 LCILFD 輸出的輸入頻率，晶片總面積為 1.2×0.928 mm2。實驗表明，該電路也適用於具有寬鎖定範圍的÷8 和÷16 ILFD。
第二部分介紹了一種採用 3 維的扭轉變壓器的除二除頻器(÷2ILFD)。3 維的扭轉變壓器為兩個扭轉串聯的 3 匝八邊形電感疊在一起所組成，使用 3 維扭轉耦合感應線圈的 ILFD 具有低電磁(EM)輻射水平，對接收到的 EM 雜訊不太敏感，而且尺寸較小，晶片總面積為 1.087×0.558mm2。8 字形變壓器和寄生電容組成雙共振的共振腔，ILFD 具有雙頻段鎖定範圍。在 1.3V 的電源電壓下，注入功率為0 dBm 時的第一個 ILFD 工作範圍為 5.91 GHz 至 13.2GHz。由於可調共振頻率，在高頻帶緩衝器處測量的操作範圍超寬。這證明了 3 維扭轉變壓器可用於無 EMLC-ILFD 設計的概念。
第三部分介紹當電感器非常靠近時，寄生磁耦合對於射頻集成電路來說是一個非常困難和重要的設計挑戰。本文首先比較了三個三匝電感的射頻性能，兩個電感採用雙 8 形電感，設計的電感採用兩個三匝八角電感雙絞串聯。與另一個類似的三匝電感器相比，設計的電感器具有更高的品質因數和更小的寄生電容。 本文還模擬了密度內密度雙絞電感的表面金屬電流和電感的噪聲抑制。雙絞電感器/變壓器將產生的場局部化，雙絞電感元件減少電感基板耦合，從而實現緊湊的電路佈局。

With the development of science and technology, the demand for high frequency
is increasing day by day, and the circuit processing high-frequency signal is more
important, among which the VCO and injection-locked frequency divider (ILFD) are
particularly important. Their power consumption is particularly large, and inductors are indispensable passive components, so the performance requirements are more stringent, such as wider operating range, low noise, low power, or multi-functional features, so this theis proposes two ILFDs and an inductor performance comparison design. All chips are manufactured using tsmc 0.18-um CMOS mixed-signal and RF 1P6M
technology process.
The first part presents a CMOS 4n injection-locked divider (ILFD) with a divideby-4 ring divider stacked on a cross-coupled LC ILFD with a divide-by-n capacitive. The locking range of ÷12 is 8.2GHz to 10.2GHz, the power consumption is 12.86mW,
and the external injection signal power Pinj is 0dBm. The ÷ 12 ILFD adopts ring
oscillator FD with a wide locking range to track the input frequency from the output of LC ILFD, the total chip area is 1.2×0.928 mm2. Experiments have shown that the circuit is also suitable for ÷8 and ÷16 ILFDs with a wide lock range.
The second part presents a divide-by-two divider (÷2ILFD) using a 3-dimensional
twisted transformer. The 3D torsional transformer is composed of two 3-turn octagonal
inductors that are twisted in series. The ILFD using the 3D twisted coupled induction
coil has a low level of electromagnetic (EM) radiation and is less sensitive to the
received EM noise. Sensitive and small in size, the total area of the chip is
1.087×0.558mm2. The 8-shaped transformer and parasitic capacitance form a double
resonant cavity, and the ILFD has a dual-band locking range. The ILFD operates from
5.91 GHz to 13.2 GHz at 0 dBm injected power at a supply voltage of 1.3 V. Ultra-wide
operating range measured at high-band buffer due to adjustable resonant frequency.
This proves the concept that 3D torsional transformers can be used for EM-free LCILFD designs.
Parasitic magnetic coupling is a very difficult and important design challenge for RF integrated circuits when the inductors are located very close together. This chapter
first compares the RF performance of three three-turn inductors, two inductors use two
8-shaped inductors in twisted series and the designed inductor uses two 3-turn octagonal inductors in twisted series. Compared with another similar 3-turn inductor, the designed inductor shows a higher quality factor and less parasitic capacitance. This chapter also simulates the surface current density in the metal traces of the twisted inductor and the noise suppression of the inductor. Twisted inductive components reduce the inductive substrate coupling, thus enabling a tight circuit layout.

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