簡易檢索 / 詳目顯示

研究生: 陳宗揚
Tsung-Yang Chen
論文名稱: 使用八字電感及各式變壓器設計壓控振盪器以及注入鎖頻倍頻器
Design of VCOs and ILFM with 8-shaped Inductors and All-Type Transformers
指導教授: 莊敏宏
Miin-Horng Juang
口試委員: 張勝良
Sheng-Lyang Jang
周錫熙
Hsi-Hsir Chou
王煥宗
Huan-Chun Wang
學位類別: 碩士
Master
系所名稱: 電資學院 - 電子工程系
Department of Electronic and Computer Engineering
論文出版年: 2022
畢業學年度: 111
語文別: 英文
論文頁數: 164
中文關鍵詞: 八字電感注入鎖頻倍頻器壓控振盪器
外文關鍵詞: 8-shaped Inductor, Injection-Locked Frequency Multiplier, Voltage-Controlled Oscillator
相關次數: 點閱:393下載:7
分享至:
查詢本校圖書館目錄 查詢臺灣博碩士論文知識加值系統 勘誤回報
  • 頻率合成器在RF射頻收發機中扮演著重要的角色,其需要產生一個穩定、乾淨的振盪訊號源傳送至混波器進行升頻、降頻,而為了追求低功率、低相位雜訊與較寬鎖定範圍的除頻、倍頻器,這其中又以VCO和注入鎖定除頻器(ILFD)、倍頻器(ILFM)最為重要,所以本篇論文分別呈現了三篇VCOs以及一篇ILFM的設計,所有的晶片都是使用tsmc 0.18-μm CMOS mixed-signal and RF 1P6M technology工藝製造。
    第一部分呈現一個節省面積的環形行波壓控振盪器(RTWO)將主動元件電晶體與可變二極體設計於電感內部,晶片面積為1.18×1.18 mm2。VCO的諧振頻率是可調的,調頻範圍從3.16 GHz至4.04 GHz (24.44%)。當供應電源為1.2 V時,功耗為12.36 mW。當振盪頻率為3.16 GHz時,量測到的相位雜訊在1 MHz的頻率偏移下為 -124.37 dBc/Hz。當供應電壓為1.2 V時,FOM值為 -183.44 dBc/Hz。此VCO架構使用雙絞電感傳輸線以抑制磁場的干擾。
    第二部分提出一個使用LC諧振的注入鎖頻倍二倍頻器 (×2 ILFD)。此架構由pMOS注入鎖定振盪器產生一倍諧振,再經由堆疊其上方的雙推式架構產生二倍頻率訊號,並將此二倍頻訊號單端輸出。此注入鎖定振盪器使用兩顆八字電感當作共振腔。當供應電源為1.2 V時,功耗為9.832 mW、二倍振盪頻率為4.175 GHz。當注入訊號功率為 0 dBm 時,輸入端注入鎖定的頻率範圍為1.6 GHz至3.2 GHz,並在輸出端產生頻率範圍從3.2 GHz至6.4 GHz (66.66%) 的訊號。晶片總面積為0.7 × 0.8 mm2。
    第三部分使用設計了一個新穎的高品質因素八字型同相位變壓器以降低電磁輻射的干擾。此變壓器分別由兩組兩路徑並聯的主要電感及次要電感相互耦合而成,並將兩組一匝線圈做串聯。當供應電源為0.7 V時,功耗為19.5 mW。當頻率為4.56 GHz時,VCO的相位雜訊在1 MHz的頻率偏移下為 -124.07 dBc/Hz、FOM值為 -185.89 dBc/Hz。晶片面積為0.549 × 0.938 mm2。
    最後部分是使用兩個三圈的八字電感設計環型壓控振盪器。架構上使用兩組差動疊接nMOS放大器做迴授。頻率調頻從2.34 GHz至3.05 GHz,中心頻率為2.695 GHz,有26.34% 的調頻範圍。當供應電源為1.3 V時,功耗為21.58 mW。當頻率為2.34 GHz時,VCO的相位雜訊在1MHz的頻率偏移下為 -125.03 dBc/Hz,FOM為 -179.07 dBc/Hz,FOMT為 -187.48 dBc/Hz,晶片總面積為1.12 × 0.96 mm2。


    The frequency synthesizer plays an important role in the RF transceiver, and it needs to provide a stable and pure oscillating signal source for the mixer to up-convert and down-convert signals. So as to pursue low power supply, low phase noise, and a wider locking range of divider and multiplier, the VCO and Injection-locked Frequency Divider (ILFD) or Multiplier (ILFM) are especially crucial. Therefore, this thesis presents three designs of VCO and one design of ILFM. All of the chips designed in this thesis are fabricated in tsmc 0.18-μm CMOS mixed-signal and RF 1P6M technology.
    The first part presents an area-saving rotary traveling-wave oscillator (RTWO) with active FETs and varactors inside on-chip inductors and the die area is 1.18×1.18 mm2. The free-running oscillation frequency of the VCO is tuneable. The tuning range is from 3.16 to 4.04 GHz (24.44%). The total power consumption shows 12.36 mW at the supply voltage of 1.2 V. The measured phase noise at 1MHz frequency offset is -124.37 dBc/Hz at the oscillation frequency of 3.16 GHz. At the supply voltage of 1.2 V, the figure of merit (FOM) of the proposed VCO is -183.44 dBc/Hz. The VCO uses the concept of the twisted-inductor transmission line to suppress magnetic field interference.
    The second part proposes an LC-tank injection-locked frequency doubler (×2 ILFD). The ×2 ILFD circuit is composed of a pMOS first-harmonic injection-locked oscillator (ILO) stacked below a push-push frequency doubler, which provides the single-phase output signal. The ILO uses two 8-shaped inductors as the resonator. The total power consumption shows 9.84 mW at the supply voltage of 1.2 V, and the free-running oscillation frequency of the ×2 ILFD is 4.175 GHz. At the incident power of 0 dBm, the input locking range is from the incident frequency 1.6 to 3.2 GHz to provide a signal source from the frequency 3.2 GHz to 6.4 GHz (66.66%). The die area is 0.7 ×0.8 mm2.
    The third part presents a novel high Q-factor 8-shaped concentric transformer which aims at low radiation interference. The transformer is coupled by two 2-path parallel primary and secondary inductors. They use two 1-turn coils twisted in series. The total power consumption shows 19.5 mW at the supply voltage of 0.7 V. At 4.56 GHz, the phase noise of VCO is -124.07 dBc/Hz at 1 MHz frequency offset, and the FOM is −185.89 dBc/Hz. The die area is 0.549 ×0.938 mm2.
    The last part designs a ring-type VCO using two 3-turn 8-shaped inductors. The VCO consists of two differential cascode nMOS amplifiers for feedback connection. The frequency tuning is from 2.34 GHz to 3.05 GHz with a center frequency of 2.695 GHz and presents a 26.34% tuning range. At the supply voltage of 1.3 V, the total power consumption is 21.58 mW. At 1 MHz offset frequency the measured phase noise of the VCO at 2.34 GHz is −125.03 dBc/Hz and the FOM is -179.07 dBc/Hz and the FOMT is -187.48 dBc/Hz. The die area is 1.12 × 0.96 mm2.

    摘要 I ABSTRACT III 致謝 V TABLE OF CONTENTS VI LIST OF FIGURES VIII LIST OF TABLES XIV CHAPTER 1 INTRODUCTION 1 1.1 Background 1 1.2 Thesis Organization 3 CHAPTER 2 PRINCIPLES AND DESIGN CONSIDERATIONS OF VOLTAGE-CONTROLLED OSCILLATORS 4 2.1 Introduction 4 2.2 The Oscillators Theory 5 2.2.1 Feedback Oscillators (Two ports) 5 2.2.2 Negative Resistance and Resonator (One port) 7 2.3 LC-Tank Oscillator 12 2.4 Design Concepts of Voltage-Controlled Oscillator 17 2.4.1 Parameters of a Voltage-Controlled Oscillator 17 2.4.1.1 Phase Noise 18 2.4.1.2 Tuning Range (Hz) 22 2.4.1.3 Power Dissipation (mW) 24 2.4.1.4 Harmonic/spurious (dBc) 26 2.4.1.5 Tuning Sensitivity (Hz/V) 26 2.4.1.6 Figure of Merit (FOM) 26 2.4.2 The analyses of the Phase Noise 27 2.4.2.1 Phase Noise time‑invariant model 27 2.4.2.2 Phase Noise time‑varying model 30 CHAPTER 3 AREA-SAVING ROTARY TRAVELING-WAVE VCO VIA TWISTED-INDUCTOR TRANSMISSION LINE 37 3.1 Introduction 37 3.2 Circuit Design 39 3.3 Measurement Results and Discussion 47 3.4 Improved Design 53 CHAPTER 4 PUSH-PUSH INJECTION-LOCKED FREQUENCY DOUBLER WITH 8-SHAPED INDUCTORS 58 4.1 Introduction 58 4.2 Circuit Design 60 4.3 Measurement Results and Discussion 71 CHAPTER 5 NMOS VCOS USING A MULTI-PATH 8-SHAPED TRANSFORMER FEEDBACK 82 5.1 Introduction 82 5.2 Circuit Design 84 5.3 Measurement Results and Discussion 110 CHAPTER 6 THREE-TURN FIGURE-EIGHT-SHAPED INDUCTOR USED IN RING VOLTAGE-CONTROLLED OSCILLATOR 116 6.1 Introduction 116 6.2 Circuit Design 117 6.3 Measurement Results and Discussion 135 CHAPTER 7 CONCLUSIONS 141 REFERENCE 143

    [1] B. Razavi and R. Behzad, RF microelectronics. Prentice hall New York, 2012.
    [2] N. M. Nguyen and R. G. Meyer, "Start-up and frequency stability in high-frequency oscillators," IEEE Journal of Solid-State Circuits, vol. 27, no. 5, pp. 810-820, 1992.
    [3] B. Razavi, Design of integrated circuits for optical communications. John Wiley & Sons, 2012.
    [4] L. Li, P. Reynaert, and M. S. Steyaert, "Design and analysis of a 90 nm mm-wave oscillator using inductive-division LC tank," IEEE Journal of Solid-State Circuits, vol. 44, no. 7, pp. 1950-1958, 2009.
    [5] Y. Peng et al., "A Harmonic-Tuned VCO With an Intrinsic-High-Q F 23 Inductor in 65-nm CMOS," IEEE Microwave and Wireless Components Letters, vol. 30, no. 10, pp. 981-984, 2020.
    [6] A. Bhat, R. Nandwana, and K. Lakshmikumar, "An Interference Suppression Technique for Millimeter-Wave LC VCOs Using a Multiport Coupled Inductor," IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 69, no. 3, pp. 919-923, 2021.
    [7] A. Masnadi et al., "A Compact Dual-Core 26.1-to-29.9 GHz Coupled-CMOS LC-VCO with Implicit Common-Mode Resonance and FoM of-191 dBc/Hz at 10MHz," in 2020 IEEE Custom Integrated Circuits Conference (CICC), 2020: IEEE, pp. 1-4.
    [8] D. Lesson, "A simple model of feedback oscillator noise spectrum," proc. IEEE, vol. 54, no. 2, pp. 329-330, 1966.
    [9] A. Hajimiri and T. H. Lee, "A general theory of phase noise in electrical oscillators," IEEE journal of solid-state circuits, vol. 33, no. 2, pp. 179-194, 1998.
    [10] S.-A. Yu and P. Kinget, "A 0.042-mm 2 fully integrated analog PLL with stacked capacitor-inductor in 45nm CMOS," in ESSCIRC 2008-34th European Solid-State Circuits Conference, 2008: IEEE, pp. 94-97.
    [11] F. Zhang and P. R. Kinget, "Design of components and circuits underneath integrated inductors," IEEE Journal of Solid-State Circuits, vol. 41, no. 10, pp. 2265-2271, 2006.
    [12] Y. Hu, T. Siriburanon, and R. B. Staszewski, "A low-flicker-noise 30-GHz class-F 23 oscillator in 28-nm CMOS using implicit resonance and explicit common-mode return path," IEEE Journal of Solid-State Circuits, vol. 53, no. 7, pp. 1977-1987, 2018.
    [13] F.-W. Kuo et al., "A Bluetooth low-energy transceiver with 3.7-mW all-digital transmitter, 2.75-mW high-IF discrete-time receiver, and TX/RX switchable on-chip matching network," IEEE Journal of Solid-State Circuits, vol. 52, no. 4, pp. 1144-1162, 2017.
    [14] A. Sharkia, S. Mirabbasi, and S. Shekhar, "A Type-I Sub-Sampling PLL With a 100×100μm2 Footprint and −255-dB FOM," IEEE Journal of Solid-State Circuits, vol. 53, no. 12, pp. 3553-3564, 2018.
    [15] S. L. Jang, S. S. Lin, C. W. Chang, and S. H. Hsu, "A complementary cross‐coupled quadrature VCO using ring‐inductor coupling method," Microwave and Optical Technology Letters, vol. 54, no. 4, pp. 839-842, 2012.
    [16] Y. Chen and K. D. Pedrotti, "Rotary traveling-wave oscillators, analysis and simulation," IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 58, no. 1, pp. 77-87, 2010.
    [17] J.-C. Chien and L.-H. Lu, "A 32-GHz Rotary Traveling-Wave Voltage Controlled Oscillator in 0.18-μm CMOS," IEEE Microwave and Wireless Components Letters, vol. 17, no. 10, pp. 724-726, 2007.
    [18] K. Takinami, R. Walsworth, S. Osman, and S. Beccue, "Phase-noise analysis in rotary traveling-wave oscillators using simple physical model," IEEE Transactions on microwave theory and techniques, vol. 58, no. 6, pp. 1465-1474, 2010.
    [19] W.-C. Lai, S.-L. Jang, and J.-J. Wang, "Dual Band Quadrature VCO Using Switched-transformer Coupling for Wireless Robot Applications," in 2019 4th Asia-Pacific Conference on Intelligent Robot Systems (ACIRS), 2019: IEEE, pp. 109-112.
    [20] M. Vigilante and P. Reynaert, "A Coupled-RTWO-Based Subharmonic Receiver Front End for 5G $ E $-Band Backhaul Links in 28-nm Bulk CMOS," IEEE Journal of Solid-State Circuits, vol. 53, no. 10, pp. 2927-2938, 2018.
    [21] A. Moroni, R. Genesi, and D. Manstretta, "Analysis and design of a 54 GHz distributed “hybrid” wave oscillator array with quadrature outputs," IEEE Journal of Solid-State Circuits, vol. 49, no. 5, pp. 1158-1172, 2014.
    [22] N. Nouri and J. F. Buckwalter, "A 45-GHz rotary-wave voltage-controlled oscillator," IEEE Transactions on Microwave Theory and Techniques, vol. 59, no. 2, pp. 383-392, 2011.
    [23] M. A. Shehata, M. Keaveney, and R. B. Staszewski, "A 184.6-dBc/Hz FoM 100-kHz flicker phase noise corner 30-GHz rotary traveling-wave oscillator using distributed stubs in 22-nm FD-SOI," IEEE Solid-State Circuits Letters, vol. 2, no. 9, pp. 103-106, 2019.
    [24] K. T. Ansari, T. Ross, P. Gamand, and C. Plett, "Frequency domain phase shift measurement technique applied to a multiphase rotary travelling-wave VCO," IEEE Microwave and Wireless Components Letters, vol. 25, no. 12, pp. 820-822, 2015.
    [25] W.-C. Lai, S.-L. Jang, and J.-W. Syu, "Quadrature VCO via transformer-coupled transmission line," in 2019 12th International Workshop on the Electromagnetic Compatibility of Integrated Circuits (EMC Compo), 2019: IEEE, pp. 2-5.
    [26] J. M. Lopez-Villegas, J. Samitier, C. Cané, P. Losantos, and J. Bausells, "Improvement of the quality factor of RF integrated inductors by layout optimization," IEEE Transactions on Microwave Theory and Techniques, vol. 48, no. 1, pp. 76-83, 2000.
    [27] W.-C. Lai, S.-L. Jang, J.-J. Wang, G.-Z. Zeng, and H.-C. Lee, "CMOS VCO with three-path inductor," in 2017 6th International Symposium on Next Generation Electronics (ISNE), 2017: IEEE, pp. 1-4.
    [28] L. Fanori and P. Andreani, "A high-swing complementary class-C VCO," in 2013 Proceedings of the ESSCIRC (ESSCIRC), 2013: IEEE, pp. 407-410.
    [29] M. Babaie and R. B. Staszewski, "A class-f cmos oscillator," IEEE Journal of Solid-State Circuits, vol. 48, no. 12, pp. 3120-3133, 2013.
    [30] C.-Y. Cha, H.-C. Choi, H.-T. Kim, and S.-G. Lee, "RF CMOS differential oscillator with source damping resistors," in 2005 IEEE Radio Frequency integrated Circuits (RFIC) Symposium-Digest of Papers, 2005: IEEE, pp. 399-402.
    [31] A. Y.-K. Chen, Y. Baeyens, Y.-K. Chen, and J. Lin, "A 36–80 GHz high gain millimeter-wave double-balanced active frequency doubler in SiGe BiCMOS," IEEE Microwave and Wireless Components Letters, vol. 19, no. 9, pp. 572-574, 2009.
    [32] L. Zhang, D. Karasiewicz, B. Cifctioglu, and H. Wu, "A 1.6-to-3.2/4.8 GHz dual-modulus injection-locked frequency multiplier in 0.18 μm digital CMOS," in 2008 IEEE Radio Frequency Integrated Circuits Symposium, 2008: IEEE, pp. 427-430.
    [33] E. Monaco, M. Pozzoni, F. Svelto, and A. Mazzanti, "Injection-Locked CMOS Frequency Doublers for μ-Wave and mm-Wave Applications," IEEE Journal of Solid-State Circuits, vol. 45, no. 8, pp. 1565-1574, 2010.
    [34] S.-L. Jang, W.-C. Lai, and R.-H. Lu, "Single-Stage Injection-Locked Frequency Sixtupler in CMOS Process," IEEE Access, vol. 10, pp. 40316-40323, 2022.
    [35] H.-C. Lee, S.-L. Jang, Y.-H. Fan, F.-S. Chou, Y.-S. Liao, and M.-H. Juang, "Divide-by-2 Injection-Locked Frequency Dividers with Twisted Inductors," in 2020 International Workshop on Electromagnetics: Applications and Student Innovation Competition (iWEM), 2020: IEEE, pp. 1-5.
    [36] A. Mahmoud, L. Fanori, T. Mattsson, P. Caputa, and P. Andreani, "A 2.8-to-5.8 GHz harmonic VCO based on an 8-shaped inductor in a 28 nm UTBB FD-SOI CMOS process," Analog Integrated Circuits and Signal Processing, vol. 88, no. 3, pp. 391-399, 2016.
    [37] C. Leifso and J. Nisbet, "A monolithic 6 GHz quadrature frequency doubler with adjustable phase offset," IEEE journal of solid-state circuits, vol. 41, no. 2, pp. 405-412, 2006.
    [38] O. Kursu, T. Rahkonen, and A. Pärssinen, "A 14.6 GHz–19.2 GHz Digitally Controlled Injection Locked Frequency Doubler in 45 nm SOI CMOS," in 2021 16th European Microwave Integrated Circuits Conference (EuMIC), 2022: IEEE, pp. 104-107.
    [39] H. Jia, L. Kuang, Z. Wang, and B. Chi, "A W-band injection-locked frequency doubler based on top-injected coupled resonator," IEEE Transactions on Microwave Theory and Techniques, vol. 64, no. 1, pp. 210-218, 2015.
    [40] J. Yang, C.-Y. Kim, D.-W. Kim, and S. Hong, "Design of a 24-GHz CMOS VCO with an asymmetric-width transformer," IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 57, no. 3, pp. 173-177, 2010.
    [41] Y.-H. Chuang, S.-L. Jang, S.-H. Lee, R.-H. Yen, and J.-J. Jhao, "5-GHz low power current-reused balanced CMOS differential Armstrong VCOs," IEEE microwave and wireless components letters, vol. 17, no. 2, pp. 139-141, 2007.
    [42] W. Zou, D. Chen, W. Peng, and Y. Zeng, "Experimental investigation of multi‐path and metal‐stacking structure for 8‐shape on‐chip inductors on standard CMOS," Electronics letters, vol. 52, no. 24, pp. 1998-1999, 2016.
    [43] N. M. Neihart, D. J. Allstot, M. Miller, and P. Rakers, "Twisted transformers for low coupling RF and mixed signal applications," in 2009 IEEE International Symposium on Circuits and Systems, 2009: IEEE, pp. 429-432.
    [44] P.-Y. Wang et al., "A low phase-noise class-C VCO using novel 8-shaped transformer," in 2015 IEEE International Symposium on Circuits and Systems (ISCAS), 2015: IEEE, pp. 886-889.
    [45] S.-J. Yun, C.-Y. Cha, H.-C. Choi, and S.-G. Lee, "RF CMOSLC-Oscillator With Source Damping Resistors," IEEE microwave and wireless components letters, vol. 16, no. 9, pp. 511-513, 2006.
    [46] J. Groszkowski, "The interdependence of frequency variation and harmonic content, and the problem of constant-frequency oscillators," Proceedings of the Institute of Radio Engineers, vol. 21, no. 7, pp. 958-981, 1933.
    [47] A. Hajimiri and T. H. Lee, "Phase noise in CMOS differential LC oscillators," in 1998 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No. 98CH36215), 1998: IEEE, pp. 48-51.
    [48] K. Kwok and H. C. Luong, "Ultra-low-voltage high-performance CMOS VCOs using transformer feedback," IEEE Journal of Solid-State Circuits, vol. 40, no. 3, pp. 652-660, 2005.
    [49] O. Tesson, "High quality monolithic 8-shaped inductors for silicon RF IC design," in 2008 IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, 2008: IEEE, pp. 94-97.
    [50] L. Tiemeijer, D. Leenaerts, N. Pavlovic, and R. Havens, "Record Q spiral inductors in standard CMOS," in International Electron Devices Meeting. Technical Digest (Cat. No. 01CH37224), 2001: IEEE, pp. 40.7. 1-40.7. 3.
    [51] N.-J. Oh and S.-G. Lee, "11-GHz CMOS differential VCO with back-gate transformer feedback," IEEE microwave and wireless components letters, vol. 15, no. 11, pp. 733-735, 2005.
    [52] V. N. R. Vanukuru, "High- Q Inductors Utilizing Thick Metals and Dense-Tapered Spirals," IEEE Transactions on Electron Devices, vol. 62, no. 9, pp. 3095-3099, 2015.
    [53] H. C. Lee, S. L. Jang, H. W. Liu, and L. Y. Chen, "Divide‐by‐2 injection‐locked frequency divider exploiting an 8‐shaped inductor," Microwave and Optical Technology Letters, vol. 63, no. 4, pp. 1024-1028, 2021.
    [54] A. Poon, A. Chang, H. Samavati, and S. S. Wong, "Reduction of inductive crosstalk using quadrupole inductors," IEEE Journal of Solid-State Circuits, vol. 44, no. 6, pp. 1756-1764, 2009.
    [55] Y. Wang, J. Xu, K. He, M. Wu, and R. Zhang, "A 67.4–71.2-GHz nMOS-only complementary VCO with buffer-reused feedback technique," IEEE Microwave and Wireless Components Letters, vol. 29, no. 12, pp. 810-813, 2019.
    [56] A. Bonfanti, S. Levantino, C. Samori, and A. L. Lacaita, "A varactor configuration minimizing the amplitude-to-phase noise conversion in VCOs," IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 53, no. 3, pp. 481-488, 2006, doi: 10.1109/TCSI.2005.858764.

    QR CODE