研究生: |
詹勝翔 Sheng-Hsiang Chan |
---|---|
論文名稱: |
AMBA 2.0 相容之匯流排控制器智財設計與驗證 The Design and Verification of Advanced Microcontroller Bus Architecture (AMBA) 2.0 |
指導教授: |
林銘波
Min-Bo Lin |
口試委員: |
陳郁堂
Yie-Tarng Chen 詹景裕 none 白英文 none |
學位類別: |
碩士 Master |
系所名稱: |
電資學院 - 電子工程系 Department of Electronic and Computer Engineering |
論文出版年: | 2007 |
畢業學年度: | 95 |
語文別: | 中文 |
論文頁數: | 85 |
中文關鍵詞: | 匯流排 |
外文關鍵詞: | ARM AMBA |
相關次數: | 點閱:160 下載:4 |
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隨著消費性電子產品市場擴大,成本與效能成為產品設計的一大重點,因此系統晶片(System on Chip, SoC)也已成為目前趨勢。在本論文中,我們使用自行設計之微處理器、匯流排控制器以及其他常見周邊,整合為一套可快速開發應用之發展平台。
設計中包括相容於ARM V4指令集之微處理器,並以相容於AMBA 2.0匯流排標準控制器將常用周邊整合為一嵌入式系統發展平台。周邊則包括記憶體介面、中斷控制器、提供4組通道之DMA控制器、支援32個可規劃輸出入埠(General Purpose Input Output, GPIO)、標準UART、4組PWM通道以及32位元計時器等。
AMBA System已分別在Xilinx的Spartan-3X C3S1500-4FG676 FPGA以及TSMC 0.35 μm元件庫上實現。FPGA設計部份,共消耗15272個LUTs,最高操作頻頻率可達16 MHz,並於實驗板上搭配自行設計之整合環境以驗證所有測試程式以及週邊功能。元件庫方面,核心面積為4704 μm × 4368 μm,等效閘數(gate count)為94131閘,整體晶片面積為5434 μm × 5434 μm,SS模式下操作頻率為33.33 MHz,平均消耗功率為179 mW~191 mW。
With the growing of the comsumer market, cost and performance are the two important factors to the success of products. One way to achieve this is to build an entire system on a silicon chip, known as system-on-a-chip (SoC). In order to provide a flexible platform for designing various applications in a short time, in this thesis we propose a platform, which includes the ARM v4 ISA compatible microprocessor IP, an AMBA bus controller and most widely used perpherials, such as the memory interface, an interrupt controller, a DMA controller, 32 GPIO ports, a UART controller, a programmable PWM controller, and a 32-bit timer.
The resulting AMBA System has been implemented and verified with Xilinx Spartan-3 XC3S1500-4FG676 FPGA and TSMC 0.35 μm cell library, respectively. In the FPGA part, it takes 15272 LUTs and operates at the maximum working frequency of 16 MHz. Furthermore, all of the testing programs and perephiral functions are run successfully in FPGA development board. In the cell-based part, the core occupies 4704 μm x 4368 μm, which is approximately equivalent to 94131 gates, and whole chip occupies 5434 μm × 5434 μm. AMBA System consumes about 179 mW~191 mW in the SS (Slow NMOS Slow PMOS model) simulation condition at the maximum working frequency of 33 MHz.
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