本論文主要探討重點為半橋式功率因數修正器輸出電壓不平衡之原因及補償之策略，首先說明功率因數定義，再介紹功率因數修正器之輸入等效電路及切換狀態，並說明六種串聯式升壓型功率因數修正電路的基本工作原理，以及功率因數修正器控制方法。然後以平均電路模型分析雙開關半橋式功率因數修正器輸出電壓不平衡之原因，並研擬經由加入直流補償電流以消除輸出電壓不平衡之控制策略，輔以平均電路模型，分析雙負載不平衡對於功率因數的影響，並實際製作一電路與理論分析結果作一驗證。另以雙開關半橋式功率因數修正器為基礎，利用四開關半橋式功率因數修正器，依據其雙負載輸出電壓之變化，控制開關操作模式，以達到不需加入直流電流補償輸出電壓不平衡，亦同樣以平均電路模型，推導其在單負載、雙負載下，對於輸出電壓不平衡補償之界限，並以實作驗證理論分析，其可符合預期之結果。
由本論文之完成，可以得到如下之結論：
1.雙開關半橋式：直流補償電流大小與輸出兩負載差值相當。不平衡之輸出負載，實際上將影響到輸出電壓不平衡及輸入功率因數，因此加入一低通濾波器來消除電壓差之交流成分，以提高功率因數。
2.四雙開關半橋式：單負載下，輸出電壓不平衡的補償可以實現，然而雙負載輸出且電壓平衡前提下，雙負載比例存在限制，為了增加雙負載差之比例範圍，降低電路之轉換效率或者提高輸出輸入電壓增益皆可達成此目的。

The subject of this dissertation is mainly related to the cause and compensation strategies of the output voltage imbalance on the half-bridge (HB) boost-type power factor corrector (PFC). At first, this dissertation introduce the definition of the power factor, and the input equivalent circuit of the PFC. This dissertation also illustrate the operating principles of six boost-type PFC circuits and the various power factor compensation schemes. Next, the voltage imbalance of a two-switch HB PFC circuit is analyzed by using the averaged circuit model. A DC component is injected in the input current to eliminate the output voltage imbalance. Also, the averaged circuit model is used to analyze the power factor for imbalanced dual loads. Furthermore, a four-switch half-bridge PFC circuit is proposed to eliminate the voltage imbalance by controlling the switches in accordance with the output voltage variation. No DC component is required to be added in the source current to compensate the output voltage imbalance. The modified averaged circuit model is analyzed to derive the boundary of the level of a single load and the ratio of the levels of dual loads. Prototype circuits are built and tested in the laboratory to verify the theoretical analysis.
The conclusions of this dissertation are given by
1.Two-switch HB PFC circuit：The levels of these DC components agree with the difference between the dual loads. The load mismatch actually influences the output voltage imbalance and the input power factor, and a low-pass filter to eliminate the AC component of the voltage difference can be added to help raise the power factor.
2.Four-switch HB PFC circuit：For the single load, the compensation effect of output voltage imbalance can be achieve. However, for the dual loads, there indeed exists a limited range for the ratio of the dual loads to eliminate the output voltage imbalance. To increase this legitimate range, either the conversion efficiency is reduced or the voltage gain is raised.

[1]C. Zhou, R. B. Ridley, and F. C. Lee, “Design and analysis of a hysteretic boost power factor correction circuit,” in Proc. IEEE PESC’90, 1990, pp. 800-807.
[2]P. C. Todd, “UC3854 controlled power factor correction circuit design,”Unitrode Application Note, 1999, pp. 3.269-3.288
[3]T. Yoshida, O. Shizuka, O. Miyashita, and K. Ohniwa, “An improvement technique for the efficiency of high-frequency switch-mode rectifiers,” IEEE Trans. Power Electron., vol. 15, no. 6, pp. 1118-1123, Nov. 2000.
[4]R. Redl and B. P. Erisman,“Reducing distortion in peak-current-controlled boost power-factor correctors,” in Proc. IEEE APEC’94, 1994, vol. 2, pp. 576-583.
[5]K. H. Liu and Y. L. Lin, “Current waveform distortion in power factor correction circuits employing discontinuous-mode boost converters,” in Proc. IEEE PESC’89, 1989, pp. 825-829.
[6]R. Richard, “Reducing distortion in boost rectifiers with automatic control,” in Proc. IEEE APEC’97, 1997, pp. 74-80.
[7]D. F. Weng and S. Yuvarajan, “Constant-switching-frequency AC-DC converter using second-harmonic-injected PWM,” IEEE Trans. Power Electron., vol. 11, no. 1, pp. 115-121, Jan. 1996.
[8]D. Simonnetti, J. Sebastian, J. A. Cobos, and J. Uceda, “Analysis of the conduction boundary of a boost PFP fed by universal input,” in Proc. IEEE PESC’96, 1996, pp. 1204-1208.
[9]N. Mohan, T. M. Undeland, and W. P. Robbins,〝Power Electronics：Converters, Applications and design,〞New York：Wiley, 1995.
[10]J. T. Boys and A. W. Green, “Current-forced single phase reversible rectifier,” Proc. Inst. Elect. Eng., pt. B, vol. 136, no. 5, pp. 205-211, Sep. 1989.
[11]J. C. Salmon, “Circuit topologies for single-phase voltage-doubler boost rectifier,” IEEE Trans. Power Electron., vol. 8, no. 4, pp. 521-529, Oct. 1993.
[12]J. C. Salmon, “Techniques for minimizing the input current distortion of current-controlled single-phase boost rectifiers,” IEEE Trans. Power Electron., vol. 8, no. 4, pp. 509-520, Oct. 1993.
[13]V. R. Kanetkar and G. K. Dubey, “Current-controlled boost-type single-phase voltage source converters for bidirectional power flow,” IEEE Trans. Power Electron., vol. 12, no. 2, pp. 269-277, Mar. 1997.
[14]Y. K. Lo, S. Y. Ou, and H. J. Chiu, “On evaluating the current distortion of the single-phase switch-mode rectifiers with current slope maps,” IEEE Trans. Ind. Electron., vol. 49, no. 5, pp. 1128-1137, Oct. 2002.
[15]B. Singh, B. N. Singh, A. Chandra, K. Al-Haddad, A. Pandey, and D. P. Kothari, “A review of single-phase improved power quality AC-DC converters,” IEEE Trans. Ind. Electron., vol. 50, no. 5, pp. 962-981, Oct. 2003.
[16]J. R. Rodriguez, J. W. Dixon, J. R. Espinoza, J. Pontt, and P. Lezana, “PWM regenerative rectifiers: state of the art,” IEEE Trans. Ind. Electron., vol. 52, no. 1, pp. 5-22, Feb. 2005.
[17]F. Forest, T. A. Meynard, S. Faucher, F. Richardeau, J. J. Huselstein, and C. Joubert, “Using the multilevel imbricated cells topologies in the design of low-power power-factor-corrector converters,” IEEE Trans. Ind. Electron., vol. 52, no. 1, pp. 151-161, Feb. 2005.
[18]B. R. Lin and T. L. Hung, “High-power-factor single-phase switch clamped rectifier,” Proc. IEE-Elect. Power Applicat., vol. 149, no. 3, pp 208-216, May 2002.
[19]R. M. F. Neto, F. L. Tofoli, and L. C. de Freitas, “A high-power-factor half-bridge doubler boost converter without commutation losses,” IEEE Trans. Ind. Electron., vol. 52, no. 5, pp. 1278-1285, Oct. 2005.
[20]B. R. Lin and T. L. Hung, “Single-phase half-bridge converter topology for power quality compensation,” Proc. Inst. Elect. Eng., pt. B, vol. 149, no. 5, pp 351-359, Sep. 2002.
[21]R. Srinivasan and R. Oruganti, “A unity power factor converter using half-bridge boost topology,” IEEE Trans. Power Electron., vol. 13, no. 3, pp. 487-500, May 1998.
[22]Y. K. Lo, H. J. Chiu, and T. H. Song, “Elimination of voltage imbalance between the split capacitors in three-phase half-bridge switch-mode rectifiers,” in Proc. IEEE PEDS’2001, 2001, vol. 1, pp. 163-165.
[23]Y. K. Lo, T. H. Song, and H. J. Chiu, “Analysis and elimination of voltage imbalance between the split capacitors in half-bridge boost rectifiers,” IEEE Trans. Ind. Electron., vol. 49, no. 5, pp. 1175-1177, Oct. 2002.
[24]R. Tymerski, V. Vorperian, F. C. Lee, and W. T. Baumann, “Nonlinear modeling of PWM switch,” IEEE Trans. Power Electron., vol. 4, no. 2, pp. 225-233, Apr. 1989.
[25]E. Van Dijk, J. N. Spruijt, D. M. O’Sullivan, and J. B. Klaassens, “PWM-Switch modeling of DC-DC converter,” IEEE Trans. Power Electron., vol. 10, no. 6, pp. 659-665, Nov. 1995.