人臉偵測是人臉辨識和臉部資料庫建立的首要步驟，對於系統的要求必須快速且準確，目前人臉偵測已經有許多種方法被提出，大多數都是基於軟體演算法方面加以改善偵測率並減少誤檢率，但隨著演算法日趨複雜，在嵌入式系統上的呈現較難達到即時(real-time)的效果。
本論文提出一個以純硬體的數位電路設計出一即時多人臉偵測系統，在這系統中主要的六個步驟為:(1)影像縮放，(2)色彩空間轉換，(3)膚色偵測，(4)膨脹與侵蝕，(5)物件連通標記法以及(6)人臉特徵擷取，將這些步驟分別設計成硬體電路模組，此系統使用Verilog硬體描述語言(Hardware Description Language)以純硬體的方式設計並在Altera DE2-70多媒體開發平台實現。
實驗結果顯示此系統使用了15,223個邏輯元件(logic elements)，人臉偵測率高達94.9%，且處理速度為每秒達30張影像(NTSC Input)，最高可同時偵測人臉數為5人，達到了高偵測率且低成本的即時人臉偵測系統。

In the field of face recognition and establishment of face database, face detection is a crucial step. Most of the face detection proposed as now are focused on software algorithms to improve the detection rate and decrease the false alarm. However, the more complex algorithm, the more computation time is required. It hinders our real-time applications.
In this thesis, we proposed a real-time multi-face detection system based on hardware design to enhance the processing time. The six steps in our processing system are as follows:(1) Image scale, (2) Color space transform, (3) Skin color detection, (4) Morphology, (5) Connected-component labeling and (6) Face feature extraction. Each step is designed by hardware circuit module written in Verilog HDL. Finally, the proposed hardware architecture is implemented on Altera DE2-70 development board to test the feasibility of our hardware design.
The implementation of our system requires 15,223 logic elements. It can operate in real-time at a frame rate of 30fps, and detect up to five faces simultaneously. The experimental result shows that our proposed face detection architecture attains a real-time reliable system with low cost and high detection rate.

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