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研究生: 曾郭中
Guo–Zhong Zeng
論文名稱: 多頻帶除四與除二注入鎖定除頻器研究與設計
Study and Design of Multi-band Divider-by-4 and Divider-by-2 Injection-Locked Frequency Divider
指導教授: 張勝良
Sheng–Lyang Jang
莊敏宏
Miin-Horng Juang
口試委員: 徐敬文
Ching-Wen Hsue
溫俊瑜
Jiun-Yu Wen
學位類別: 碩士
Master
系所名稱: 電資學院 - 電子工程系
Department of Electronic and Computer Engineering
論文出版年: 2017
畢業學年度: 105
語文別: 英文
論文頁數: 135
中文關鍵詞: 除頻器
外文關鍵詞: Injection-Locked Frequency Divider
相關次數: 點閱:390下載:2
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  • 首先,第一部分我們研究雙電容交叉耦合注入鎖定除頻器的鎖頻範圍屬性,此除頻器實現於台積電矽鍺0.18 μm製程。此除頻器使用三個電感而晶片的面積為0.87×0.89mm2。此除頻器注入-20dBm到15dBm可以看到三個沒有重疊的鎖頻範圍也就說明在沒有使用可變電容的情況下有多個頻帶。此注入鎖定除頻器當注入功率Pinj=0 dBm時功率消耗為2.8mW,除二的除頻範圍有4.35GHz,從2.47GHz到6.82GHz。
    接著,第二部份我們研究一個除四注入鎖定除頻器的除頻範圍屬性,主要的注入功率為-20dBm到14dBm。此除頻器由一組電容交叉耦合和一個諧波混波MOSFET和六階RLC共振腔組成。量測也出現三頻帶,晶片的面積為0.887 ×0.987 mm2。
    最後,這篇論文設計一個寬除頻範圍除四/除二LC注入鎖定除頻器,此除頻器使用電容交互耦合震盪器加上注入MOSFET與6階RLC共振腔組成。另外加上電阻增強除頻範圍。在量測時三個頻帶的調頻範圍與廚頻範圍皆可被量測到。集極到源極的偏壓為1.3V,在此電壓下注入功率0dBm的除四除頻範圍為5.81GHz(53.1%)從8.34GHz到14.15GHz。功率消耗為13.546mW。在核心功率消耗為4.024mW,注入功率為0dBm時除二的鎖頻範圍從2.83GHz到9.31GHz(106.75%)。晶片的面積為0.887 ×0.987 mm2


    First, this thesis studies the locking range property of a dual capacitive cross-coupled injection-locked frequency divider (ILFD) implemented in the TSMC standard 0.18 μm BiCMOS process. The ILFD uses three on-chip inductors and occupies an area of 0.87×0.89mm2. The ILFD is subject to an injection power Pinj between -20 dBm and 15 dBm. At high injection power, the ILFD can have three non-overlapped locking ranges indicating that the ILFD uses multi-resonance resonator since no varactor is used. At injection power Pinj=6 dBm and at the power consumption of 3.28 mW, the ÷2 locking range for the designed ILFD is 4.92 GHz from 2.22 GHz to 7.14 GHz.
    Secondly, this thesis studies the locking range property of divide-by-4 LC injection-locked frequency divider (ILFD) subject to input power from -20 dBm to 14 dBm. The ILFD combines a cross-coupled oscillator with a direct injection harmonic mixer MOSFET and a 6th-order RLC resonator. Triple-band tuning range is measured. The die area is 0.887 ×0.987 mm2.
    Finally, this thesis designs a wide locking range divide-by-4/2 LC injection-locked frequency divider (ILFD). The ILFD is based on a capacitive cross-coupled oscillator with a direct injection MOSFET and a 6th-order RLC resonator. Resistors are used to enhance the locking range. Triple-band tuning range is measured and triple-band locking range is also measured. At the drain-source bias of 1.3 V, and at the incident power of 0 dBm the locking range of the divide-by-4 ILFD is 5.81 GHz (53.1%) from 8.34 to 14.15 GHz. The power consumption of ILFD core is 13.546 mW. At the power consumption of 4.024 mW. The divide-by-2 locking range is from 2.83 to 9.31 GHz (106.75 %) at injection power of 0 dBm. The die area is 0.887 ×0.987 mm2.

    摘要 Abstract 致謝 Table of Contents List of Figures List of Tables Chapter 1Introduction 1.1 Background 1.2 Thesis Organization Chapter 2 Overview of the Voltage-Controlled Oscillators 2.1 Thesis Organization 2.2 Basic Theory of Oscillators 2.2.1 Positive Feedback (Two-Port) View Oscillators 2.2.2 Negative Resistance (One-Port) View Oscillators 2.3 The Classification of Oscillators 2.3.1 Ring Oscillator 2.3.2 LC-Tank Oscillator 2.3.3 Research of RLC Tank 2.3.4 Type of LC Oscillator 2.4 Design Parameter of Voltage-Controlled Oscillator 2.5 Significant Issue of Voltage-Controlled Oscillator 2.5.1 Definition of Phase Noise 2.5.2 Linear Time-Invariant (LTI) Phase Noise Model 2.5.3 Linear Time-Variant Phase Noise Model 2.5.4 Classification of Noise 2.5.5 Quality Factor 2.5.6 Figure of Merit [dBc/Hz] 2.6 Elements of Semiconductor Process 2.6.1 Resistor 2.6.2 Inductor 2.6.3 Capacitor 2.6.4 Varactor Chapter 3 Design of Injection Locked Frequency Divider 3.1 Principle of Injection Locked Frequency Divider 3.2 Locking Range 3.3 Direct ILFD Chapter 4 High-Injection Power Property of Cross-Coupled Divide-by-2 Injection-Locked Frequency Divider 4.1 Introduction 4.2 Circuit Design 4.3 Measurement Results Chapter 5 High-Injection Property of Harmonic Mixer Dvide-by-4 Injection-Locked Frequency Divider 5.1 Introduction 5.2 Circuit Design 5.3 Measurement Results and Discussion Chapter 6 Single-Stage Triple-Resonance Divide-by-4 and -2 Injection-Locked Frequency Divider 6.1 Introduction 6.2 Circuit Design 6.3 Measurement Results and Discussion Chapter 7 Conclusions References

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