嵌入式系統有著記憶體使用上的限制，且程式碼壓縮技術透過降低應用程式的程式碼大小來解決此一問題。一個有效率的程式碼壓縮技術，其主要的挑戰為，如何在不影響系統整體效能下盡可能的降低程式碼的大小。以字典為基礎的程式碼壓縮技術是目前最常被採用的方法；因為它除了可以提供良好的壓縮效率之外，更可滿足快速的解壓縮需求。
在本論文中，我們提出一個以「互斥或運算(XOR)」為基礎的參照方法，可應用於現存之所有以字典為基礎的程式碼壓縮技術上；透過改變符號的分佈，可以進一步的提升以字典為基礎的程式碼壓縮技術之壓縮效率。我們的方法可以應用在所有固定指令長度的計算機架構上，例如簡單指令指架構（RISC）或固定長度之超長指令碼架構（VLIW）上。本論文採用TSMC 0.13-um technology library對解碼單元進行合成，並且使用Synopsys公司的工具軟體對功率消耗進行分析;實驗結果指出，我們的方法可以進一步提升程式碼之壓縮效率，並且幾乎不會造成硬體成本、執行效能與系統功耗上之額外負擔。

Embedded systems are constrained by the available memory, and code-compression techniques address this issue by reducing the code size of application programs. The main challenge for the development of an effective code-compression technique is to reduce the code size without affecting the overall system performance. Dictionary-based code- compression schemes are the most commonly used code-compression methods, because they can provide both a good compression ratio and fast decompression.
In this dissertation, we propose an XOR-based reference scheme that can enhance the compression ratio on all the existing dictionary-based algorithms by changing the distribution of the symbols. Our approach works on all kinds of computer architecture with fixed length instructions, such as RISC or VLIW. We use Synopsys’ tools to estimate the power consumption using TSMC 0.13-m technology. Experiments show that our approach can further improve the compression ratio with nearly no hardware, performance, and power overheads.

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