近年來，政府及相關用電單位皆要求許多到達一定功率級別的交流供電系統需裝設功率因數(Power Factor Correction)修正電路，良好的功率因數修正器可有效降低輸入電源之視在功率以及總諧波失真。另一方面，數位控制具有較佳抗雜訊干擾能力，也能較輕易實現複雜的控制系統。隨著運算能力日漸提高以及較低的成本，數位控制系統也被廣泛應用在市面上的電源轉換器。
本文實際完成一數位化功率因數修正電路，功率級採用升壓型轉換器，並以數位電壓隨耦控制法實現，數位控制器的部分採用Microchip dsPIC33F16GS502作為控制核心，最後，透過此實際完成之功率因數修正器的實驗結果來驗證此論文所提出之數位電壓隨耦控制之正確性。
關鍵詞：功率因數修正器、電壓隨耦控制法、數位定頻

Abstract
Many ac-powered systems above a certain power level require power factor correction (PFC) circuits, which is demanded by the utility or the government. An effective PFC can reduce the apparent power required as well as the total harmonic distortion of the input line current. On the other hand, digital control boasts advantages such as reduced sensitivity to noise and the capability to realize sophisticated control algorithms. With the rapid increase of the computational power and the reduction of cost, digital controllers gain its popularity in implementing power converters.
In this thesis, the digital control for power factor correction circuit is studied. The power stage of the PFC is a boost converter. Using this prototyping circuit, a digital voltage follower PFC will be realized. The digital control algorithms is implemented using the Microchip dsPIC33F16GS502 digital signal controller (DSC). Finally, experimental results of this PFC circuits are provided to validate the correctness of the proposed digital control algorithm.

Keywords: power factor corrector, voltage-follower control、Digital Fixed
Frequency

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