本論文提出基於相關雜訊通道的SC-CNN極化碼(Polar Code)解碼器之超大型積體電路(VLSI)設計與實作，以SC-CNN演算法為基礎，改良成可適應不匹配相關雜訊通道的硬體架構，降低因CNN權重參數與相關雜訊通道不匹配時造成的效能下降，並加入CRC校驗機制在解碼正確時提早停止運算，減少平均電路解碼時間。
本論文使用Python和Matlab作為演算法的軟體模擬平台，並使用電路和成軟體做電路效能評估。
論文內容包含極化碼介紹、卷積神經網路介紹、用於相關雜訊之CNN解碼介紹、SC-CNN解碼器改良與架構設計、硬體架構設計與比較，最後總結論文成果與描述未來設計方向。

This paper proposes a Very Large Scale Integration (VLSI) design and implementation of a Successive Cancellation Convolutional Neural Network (SC-CNN) polar code decoder for application in correlated noisy channels. The decoder is based on the SC-CNN algorithm and is modified to adapt to mismatched correlated noisy channels, reducing performance degradation caused by mismatch between CNN weight parameters and correlated noisy channels. Additionally, a CRC verification mechanism is incorporated to stop computation early when decoding is correct, reducing the average circuit decoding time.
Python and Matlab are used as the software simulation platforms for the algorithm, while circuit and software are utilized to estimate the circuit performance.
The contents of the paper include an introduction to polar codes, an introduction to Convolutional Neural Networks (CNN), an introduction to CNN decoding for correlated noisy channels, the improvement and architecture design of the SC-CNN decoder, hardware architecture design and comparison. Finally, the paper concludes with a summary of achievements and outlines future design directions.

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