隨著積體電路製程提升，功耗效率及內部元件溝通延遲等問題日益受到重視。為解決上述問題，三維多核心架構發展日益蓬勃。然而，三維多核心架構的功率密度提升以及散熱面積縮小所引發的過熱問題使其產品化困難度提高。因此本論文提出三維多核心架構即時熱管理機制，在滿足效能限制及晶片溫度控制下提升系統整體利用率。本論文首先提出熱量抑制的概念以制衡處理器核心在執行任務時產生的熱量並管理三維堆疊的熱效應。針對三維同質多核心處理器，考慮獨立任務執行時將消耗不同程度的功率，提出熱調節配置器分配熱量抑制給各處理核心並分配任務執行核心；且提出熱調節伺服器決定核心執行效率以滿足任務之時間限制級系統溫度限制。針對三維異質多核心處理器，考慮其協同執行特性與端對端截止期限之相依性任務，提出熱量抑制比例檢測管理協同執行的熱相依性，並提出協同熱調節配置器配合動態熱量抑制(預算)回收機制最大化系統可服務的任務利用率。本論文之貢獻主要為：(1)本論文首次提出熱量抑制(預算)之概念以建構熱量產生、熱傳導、執行頻率等之間關係。(2)為保證系統可靠性，本篇論文首度提出熱感知可排程性測試方法，包含單顆核心、多核心與相依性任務等各種模型，有助於快速導入熱感知於現存即時排程器。(3)本論文所提出之熱管理機制可通用且適應於各種二維/三維之同質/異質多核心處理器，同時保證良好之系統效能。本論文除一連串綜合性測試外，並將提出的方法移植於LINUX作業系統與實際硬體平台。由實驗結果得知，相較於現存的熱管理方法，本論文提出的方法可在滿足溫度限制下，提升系統約20-60%的效能。

Three-dimensional (3D) multicore processors have been recently developed to resolve the power consumption and interconnection delay problems of embedded systems; however, thermal management has proven to be challenging due to the thermal behavior from vertically stacked cores, and the subsequent trade-off that occurs between performance requirements and overheating. This dissertation investigates thermal management for 3D multicore processors with respect to the above tradeoffs. A novel thermal-aware real-time scheduling framework to schedule dynamic workloads for 3D multicore processors is proposed. We first present the concept of thermal size to manage the heat generated by task executions and to deal with the thermal conduction from vertically aligned cores. Considering homogeneous multicore processors with independent tasks having varied power consumption, a thermal-throttling dispatcher and a thermal-throttling server are proposed to determine the execution frequency for scheduling the arrival task based on its power consumption enabling thermal awareness in all real-time multicore schedulers. When the heterogeneous-ISA multicore processors are considered, to meet the end-to-end deadline of a task, a thermal size ratio detection and run-time thermal budget reclaiming are proposed to manage the heat generated from synergistic execution on heterogeneous-ISA cores with varied power consumption. To ensure that all tasks meet the timing and thermal constraints, the admission controls are then derived for both 3D homogeneous and heterogeneous-ISA multicore processors with corresponding task models. In this dissertation, we made the contributions as follows: (1) The thermal size (budget) concept is first presented to construct the relation between heat generation, thermal conduction, and execution frequency for thermal management. (2) The admission control is first proposed for 3D multicore processors to prevent the thermal constraint violations and guarantee the quality of service of tasks. (3) The proposed thermal management can universally adapt to all 2D/3D homogeneous/heterogeneous multicore processors with existing schedulers. The evaluation results indicate that the proposed framework registered 20-60% improvement in system utilization compared with existing thermal managements while meeting the thermal constraints.

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