本論文主要研究方向為矽基發射與接收積體電路的設計，其中包含矽發光與檢光晶片、矽發光元件驅動電路、差動式轉阻放大器、限幅放大器以及單端輸入轉阻放大器。
首先，採用台積電 0.35μm 2P4M COMS製程與台積電 0.18μm 1P6M CMOS兩種製程來實現三種矽發光元件與檢光晶片，其中一種設計採用0.35μm COMS 製程的PMOS結構。另兩種設計以0.18μm COMS 製程自行設計佈局，所不同處為一種倂用串聯與並聯基本晶片，一種則全用並聯架構。量測結果發現PMOS型佈局在順偏時具有較高的發光效率，併用串聯與並聯者在逆偏時有較高的發光效率，至於檢光特性上，併用串聯與並聯者具有較高響應度為3.107A/W。其次，也設計發光晶片所用的驅動電路，其輸出電流為可調動的，適合較低電流的矽發光元件使用。
最後，以0.35μm 2P4M COMS與0.18μm 1P6M CMOS製程來設計差動式轉阻放大器與限幅放大器以及單端輸入轉阻放大器。電路中的輸入級為RGC架構，主要目的在隔絕輸入的寄生電容，使頻寬變高，並透過限幅放大器增加輸出電壓的振幅。單端輸入轉阻放大器在供應電壓為3.3V，輸入電容為0.25pF，模擬所得增益值為61.04dBΩ，頻寬為2.003GHz以及總消耗功率為67.89mW。差動轉阻放大器在供應電壓為1.8V，輸入電容為0.25pF，模擬所得增益值為82.47dBΩ，頻寬為3.575GHz以及總消耗功率為26.03mW。

This thesis demonstrates the design and realization of silicon light-emitting and optical receiving integrated circuits, including the light-detection chip, silicon light-emitting device, driver for silicon light-emitting device, differential transimpedance amplifier with limiting amplifier, and single-ended transimpedance amplifier.
Firstly, three designs of silicon light-emitting and light-detection devices are realized and compared employing two processes, the TSMC 0.35μm 2P4M COMS process and the TSMC 0.18μm CMOS 1P6M process. One design is made using the PMOS structure in the former process. Two fully self-layout designs use the same TSMC 0.18μm CMOS 1P6M process, but one with series-parallel combination and the other with parallel combination. Measurements show that the design with PMOS structure has the highest emitting efficiency when biased in a forward bias, while the 0.18μm series-parallel combination design has the highest light emitting efficiency when biased in a reverse bias. As for the light-receiving characteristics, the 0.18μm series-parallel combination design has also the highest responsivity of 3.107 A/W. Then, a driver circuit is designed for silicon light-emitting device. Its output current is adjustable and good for low-current devices.
Finally, the designs of differential transimpedance amplifier followed by a limiting amplifier and single-ended transimpedance amplifier are studied, using the TSMC 0.35μm 2P4M COMS and TSMC 0.18μm CMOS 1P6M processes. RGC type is used as input stage in the circuits. It the effectively isolates the input parasitic capacitance, and therefore increases the bandwidth performance. For the single-ended transimpedance amplifier at 3.3V voltage and 0.25pF input capacitance, our simulated gain is 61.04dBΩ, the bandwidth 2.003GHz, and the total power consumption 67.89mW. As for the differential transimpedance amplifier at a 1.8V voltage and 0.25pF input capacitance, our simulated gain is 82.47dBΩ, the bandwidth 3.575GHz, the bit rate 3.0Gbps, and the total power consumption 26.03mW.

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