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研究生: 蘇士翔
Shyh-Shyang Su
論文名稱: 左圓之雙頻帶壓控振盪器與三頻帶壓控振盪器且頻率調變
Design of Dual Band Left-Hand Circle Voltage-Controlled Oscillator and Triple Band Left-Hand Circle Voltage-Controlled Oscillator with Frequency Tuning
指導教授: 張勝良
Sheng-Lyang Jang
徐敬文
Ching-Wen Hsue
口試委員: 賴文政
Wen-Cheng Lai
黃進芳
Jhin-Fang Huang
學位類別: 碩士
Master
系所名稱: 電資學院 - 電子工程系
Department of Electronic and Computer Engineering
論文出版年: 2016
畢業學年度: 104
語文別: 英文
論文頁數: 146
中文關鍵詞: 雙頻帶壓控振盪器三頻帶壓控振盪器頻率調變左圓
外文關鍵詞: Frequency tuning
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在無線通訊傳輸系統中,本地的鎖相迴路與頻率合成器最為重要,而其中鎖相迴路與頻率合成器的核心部分-壓控振盪器最為重要。壓控振盪器的好壞會直接且嚴重的影響整個鎖相迴路或是頻率合成器的效能,其中壓控振盪器有幾個重要的性能指標,包含振盪頻率、功耗、相位雜訊、頻率調動範圍、以及晶片面積。在前三項的部分,有一個性能指標FoM,我們通常看一個壓控振盪器的性能指標就可以整體性的知道這顆壓控振盪器的好壞。
首先,第一顆晶片,我們介紹一顆雙頻帶的左手壓控振盪器,在Cross-Couple MOS的Gate端接上ClassAC電路架構 ,Vtune設計在兩個共振腔之間。使用台積電180nm製程,工作頻率分別為4.256~4.367GHz與3.66GHz~3.726GHz,輸入電壓為0.9V下的功耗為5.238mW,晶片面積為0.642×1.063mm2,並且討論遲滯區域與偏壓的關係,將電路獨立操作Vc的變化與頻率調變關係,操作Vdd變化與頻率調變關係的範圍。

  第二顆晶片,我們介紹一顆雙頻帶的左手壓控振盪器,在Cross-Couple MOS的Gate端接上ClassAC電路架構,Vtune設計在共振腔與Cross-Couple之間。使用台積電180nm製程,工作頻率分別為4.04~4.36GHz與6.09GHz~6.21GHz,輸入電壓為0.65V下的功耗為4.138mW,晶片面積為0.527×0.749mm2,並且討論頻率調變與偏壓的關係,將電路獨立操作Vc的變化與頻率調變關係,操作Vdd變化與頻率調變區的縮減,最後在頻率調變與Vt偏壓發現雙主頻的現象。

第三顆晶片,我們設計了一個由三個電感所組成的三頻帶左手壓控振盪器,Vtune1設計在L3與L2之間,而Vtune2設計在L1與Cross-Couple pair之間。三個震盪頻帶分別為4.27GHz~4.49GHz,6.98GHz~7.41GHz,5.28GHz~5.31GHz,輸入電壓為0.65V時的功耗為3.735mW,面積為0.568×1.189mm2,最後討論頻率調變與偏壓的影響,將電路獨立操作Vdd的變化與頻率調變區域關係,最後在遲滯區內的Vt偏壓發現雙主頻的現象。


In the wireless communication system, Phase-Locked Loop / Frequency synthesizer are the most important part in the Local part. In the PLL/Frequency synthesizer which Voltage-Controlled Oscillator is the most important unit. The performance of PLL/Frequency synthesizer are depend on VCO. Frequency , power consumption, phase noise are the reference of FoM (Figure of Merit). Frequency tuning range and chip size are another consideration for SoC (System on Chip). For the better performance of PLL/Frequency synthesizer, carefully designed VCO is needed.
In the first chip, we design a Left-Hand VCO with dual-band uses two inductors and set Vtune between L1 and L2. The architecture uses L1 with C1、C2 to form a resonator and L2 with C3、C4 to form another resonator. The proposed Dual-band VCO operates with 0.9 V supply voltage and fabricated in TSMC 0.18-µm CMOS process. The measured tuning range are 4.256~4.367GHz and 3.66~3.726GHz. Phase noise is -118.85 dBc/Hz at 1 MHz offset from 4.256 GHz. Power consumption is 5.238 mW. At last, we discuss about frequency tuning with Vc and Vdd. The whole chip size including pads is 0.642×1.063mm2.
In the second chip, we design a Left-Hand VCO with dual band using two inductors and set Vtune between L2 and Cross-Couple pair. The architecture uses L1 with C1、C2 to form a resonator and L2 with C3、C4 to form another resonator. The first band range is from 4.04GHz~4.36 GHz. The second band tuning range is from 6.09GHz~6.21GHz. The proposed Dual-band VCO operates with 0.65 V supply voltage and fabricated in TSMC 0.18-µm CMOS process. Power consumption is 4.138mW . At last, we discuss about frequency tuning with Vc and Vdd. For the specific Vt in Hysteresis, we have dual tones at different resonance frequencies in full span spectrum. Whole chip size including pads is 0.527×0.749mm2.
In the third chip, we proposes a Triple-band Left-Hand VCO. We use three inductors and three pair capacitors to form three resonators to generator triple-band frequency signals. We set Vtune1 between L2 with L3 and Vtune2 between L1 with a Cross-Coupled MOS pair. The measured first band frequency is from 4.27GHz~4.49GHz . Second band frequency is from 6.98GHz~7.41GHz . Third band frequency is from 4.27GHz ~ 4.49GHz.The power consumption is 3.735mW. This chip is implement in TSMC 0.18 μm 1P6M CMOS process. At last, We discuss about frequency tuning with Vc and Vdd. For the specific Vt in hysteresis, we have dual tones at different resonance frequencies in full span spectrum. The chip size including pads is 0.568 × 1.189 mm2.

中文摘要 I ABSTRACT III TABLE OF CONTENTS VI LIST OF FIGURES VIII LIST OF TABLES XIV CHAPTER 1 INTRODUCTION 1 1.1 MOTIVATION AND BACKGROUND 1 CHAPTER 2 OVERVIEW OF THE VOLTAGE-CONTROLLED OSCILLATORS 8 2.1 INTRODUCTION 8 2.2 BASIC THEORY OF OSCILLATORS 9 2.2.1 One-Port (Negative Resistance) View 10 2.2.2 Two-Port (Feedback) View 14 2.3 THE CLASSIFICATION OF OSCILLATORS 17 2.3.1 Ring Oscillator 17 2.3.2 LC-Tank Oscillator 19 2.3.3 Research of RLC Tank 24 2.3.4 Type of LC Oscillator 27 2.3.4.1 Single Transistor Oscillator 28 2.3.4.2 Cross-Coupled Oscillator 34 2.3.4.3 One-Port Oscillator (Negative-Gm Oscillator) 37 2.3.4.4 Complementary Cross-Ccouple Topology 39 2.3.4.5 Quadrature Voltage-Controlled Oscillator 41 CHAPTER 3 BASIC CONCEPT OF VOLTAGE-CONTROLLED OSCILLATOR DESIGN 46 3.1 DESIGN PARAMETER OF VOLTAGE-CONTROLLED OSCILLATOR 46 3.2 SIGNIFICANT ISSUE OF VOLTAGE-CONTROLLED OSCILLATOR 49 3.2.1 Definition of Phase Noise 49 3.2.2 Linear Time-Invariant (LTI) Phase Noise Model 51 3.2.3 Linear Time-Variant Phase Noise Model 55 3.2.4 Classification of Noise 57 3.2.4.1 Thermal Noise 58 3.2.4.2 Flicker Noise 60 3.2.4.3 Phase Noise in Communications 61 3.2.5 Quality Factor 63 3.3 ELEMENTS OF SEMICONDUCTOR PROCESS 65 3.3.1 Resistor 65 3.3.2 Inductor 66 3.3.3 Transformer 75 3.3.3.1 Planar Transformer 78 3.3.3.2 Stacked Transformer 79 3.3.4 Capacitor 80 3.3.5 Varactor Design 83 3.3.5.1 P-N Reverse Biased Diode 84 CHAPTER 4 LOW PHASE NOISE CLASS-C DUAL-BAND VOLTAGE-CONTROLLED OSCILLATOR WITH LEFT-HANDED RESONATOR 88 4.1 INTRODUCTION 88 4.2 CIRCUIT DESIGN 89 4.3 MEASUREMENT RESULTS 90 CHAPTER 5 LOW POWER CLASS-C DUAL-BAND VOLTAGE-CONTROLLED OSCILLATOR WITH LEFT-HANDED RESONATOR 97 5.1 INTRODUCTION 97 5.2 CIRCUIT DESIGN 98 5.3 MEASUREMENT RESULTS 98 CHAPTER 6 TRIPLE-BAND VOLTAGE-CONTROLLED OSCILLATOR USING LEFT-HAND RESONATOR 105 6.1 INTRODUCTION 105 6.2 CIRCUIT DESIGN 107 6.3 MEASUREMENT RESULTS 109 CHAPTER 7 CONCLUSION 119 REFERENCES 121

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