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研究生： 廣眾雅
Trong-Nha Quang
論文名稱： 具低壓突波之單級電流饋入式功率因數修正轉換器
Single-Stage Current-Fed Power Factor Correction Converters with Low Voltage Spike
指導教授： 羅有綱
Yu-Kang Lo
邱煌仁
Huang-Jen Chiu
口試委員: 陳建富
Jiann-Fuh Chen
梁從主
Tsorng-Juu Liang
陳耀銘
Yaow-Ming Chen
林景源
Jing-Yuan Lin
劉益華
Yi-Hwa Liu
學位類別： 博士
Doctor
系所名稱： 電資學院 - 電子工程系
Department of Electronic and Computer Engineering
論文出版年： 2014
畢業學年度： 102
語文別： 英文
論文頁數： 92
中文關鍵詞： 共模雜訊 、差模雜訊 、反馳式功率因數修正轉換器 、零電壓切換單 、單級功率因數修正轉
外文關鍵詞： Common mode noise, differential mode noise, flyback PFC converter, zero voltage switching, single-stage PFC converter
相關次數： 點閱：503  下載：31 
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    • 傳統的單級功率因數修正器存在著電壓突波、輸入電流為不連續導通模式、變頻切換控制等缺點。成為轉換器效率低落、高電磁干擾、使用高價格功率元件的主因。本論文針對功率因數修正器提出三種拓樸，在低功率應用場合，有兩種拓樸具有零電壓切換與高功率密度等特性，分別為電流饋入式反馳式轉換器以及具零電壓切換之電流饋入式反馳式功率因數修正轉換器。在高功率應用場合，本論文提出一種新型的電流饋入式全橋功率因數修正器，利用準諧振Z-Source配置方式，藉由箝位電容電路有效地達到無功率損耗消除功率開關上的突波電壓。因此，使用低耐壓的功率開關，其導通電阻隨之降低，且輸入電流操作在連續電流導通模式。其改善並提高效率、輸入電流品質因數以及降低共模雜訊。本論文亦評估對於EMI傳導的差模迴路以及共模迴路模型之分析。最後，實作出傳統功率因數修正器以及本論文所提出之新型功率因數修正器，並分別比較其效能及可行性。根據實驗結果，本論文提出之新型功率因數修正器完全地消功率開關上的電壓突波，且輸入電流為連續電流導通模式，其轉換效率隨著換用低耐壓、低導通電阻的功率開關而隨之上升。

    Previous studies on the single-stage power factor correction (PFC) converters expose some shortcomings such as high voltage spike on power devices, discontinuous conduction mode (DCM) input current and switching frequency variation. These undesired factors cause efficiency limitation, high electromagnetic interference (EMI) intensity and high-voltage high-cost power device use. In this dissertation, three topologies are proposed for PFC applications. For low power applications, two topologies named current-fed flyback and zero-voltage-switching (ZVS) current-fed flyback PFC converters featuring voltage-spike-free on MOSFET, high power quality and ZVS achievement are proposed. For high power applications, a novel current-fed full-bridge (CFFB) PFC converter is proposed to improve efficiency, input current quality and reduce common mode (CM) noise. Utilizing quasi z-source configuration, the voltage spike on the MOSFETs is effectively eliminated by capacitive clamping circuit without power loss consumption. Low voltage MOSFETs with low on-resistance Rds(on) are used to improve efficiency. The input current is continuous conduction mode (CCM) operation. Additionally, to evaluate the conducted EMI behavior, the differential mode (DM) loop and CM loop models are also thoroughly analyzed and presented in this study. Several laboratory prototypes of the conventional PFC converters and proposed PFC converters were built to compare their performances and demonstrate the circuit feasibility. The experimental results showed that the proposed topologies completely eliminated the voltage spikes on the MOSFETs. The efficiency improved by using low Rds(on) MOSFETs. The input current was CCM operation.

    TABLE OF CONTENTS 摘要 i ABSTRACT iii ACKNOWLEDGEMENT iv TABLE OF CONTENTS v LIST OF TABLES viii LIST OF FIGURES ix CHAPTER 1: INTRODUCTION 1 1.1 Research background 1 1.2 Motivation and objectives of the dissertation 4 1.3 Research framework 5 CHAPTER 2: LITERATURE STUDY 7 2.1 Introduction 7 2.2 Passive snubber circuits 8 2.2.1 RC damping circuit 8 2.2.2 RCD voltage snubber in reducing of rise slope mode 11 2.2.3 RCD snubber in voltage clamping mode 14 2.2.4 RCD voltage snubber for single-stage flyback PFC converter 16 2.3 Single-stage flyback PFC converter with active clamp 18 2.4 Quasi z-source structure 19 2.5 Summary 21 CHAPTER 3: CURRENT-FED FLYABACK CONVERTERS FOR PFC APPLICATION 22 3.1 Introduction 22 3.2 Current-fed flyback converter with PFC (CFFC-PFC) 24 3.2.1 Operation principle of the current-fed flyback converter (CFFC) 24 3.2.2 Circuit consideration of the CFFC-PFC 31 3.2.3 Experimental results of the CFFC-PFC 32 3.3 ZVS current-fed flyback converter with PFC (ZVS-CFFC-PFC) 37 3.3.1 Operation principle of the ZVS current-fed flyback converter (ZVS-CFFC) 39 3.3.2 Experimental results of the ZVS-CFFC-PFC 44 3.4 Summary 49 CHAPTER 4: MODIFIED CURRENT-FED FULL-BRIDGE POWER FACTOR CURRECTION CONVERTER 51 4.1 Introduction 51 4.2 Operation principle and circuit analysis 54 4.2.1 Stage 1 [t0-t1] 57 4.2.2 Stage 2 [t1-t2] 58 4.3 Influence of the transformer leakage inductance 60 4.4 EMI equivalent circuit 61 4.4.1 Equivalent circuit of the DM noise loop 63 4.4.2 Equivalent circuit of the CM noise loop 63 4.5 Circuit consideration 64 4.6 Experimental results and discussion 66 4.7 Summary 73 CHAPTER 5: CONCLUSION AND FUTURE WORK 74 5.1 Conclusion 74 5.2 Future work 75 REFERENCES 77

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