此論文提出了三個直接注入鎖定除頻器，第一個是一個低電壓直接注入鎖定除三除頻器，第二是一個低電壓直接注入鎖定除二除頻器，最後是一個低電壓四相位直接注入鎖定除二除頻器，前者使用了標準台積電0.35微米製程去實現，而後二者則使用0.18微米CMOS製程去實現。
在低電壓直接注入鎖定除三除頻器中，此電路包含由兩個N型金氧半電晶體交錯耦合對為中心所組成的壓控振盪器以及兩個用來注入訊號的N型金氧半電晶體並聯共振腔電感所組成。量測結果顯示在注入訊號0 dBm時，其鎖定範圍是從14.45 GHz 到 15.68 GHz，而其消耗功率在供應電壓1.0 V之下只有4.0 mW，其調變頻率則可從 4.83 GHz 到 5.21 GHz。
在低電壓直接注入鎖定除二除頻器裡，此除頻器包含由兩個NMOS交錯耦合對為中心所組成的壓控振盪器以及一個注入NMOS而成。量測結果顯示在注入訊號0 dBm時，其鎖定範圍是從4.1 GHz 到 11.2 GHz，而其消耗功率在供應電壓0.8 V之下只有10.3 mW，其調變頻率則可從 3.6 GHz 到 4.17 GHz。
在低電壓四相位直接注入鎖定除二除頻器中，此電路由一個新式5.35GHz 四相位壓控震盪器以及兩個用來注入訊號的N型金氧半電晶體開關並聯共振腔所組成，量測結果顯示在注入訊號0 dBm時，其鎖定範圍是從8.23 GHz 到 13.27 GHz，而其消耗功率在供應電壓0.8 V之下只有5.72 mW，其調變頻率則可從 5.24. GHz 到 5.55 GHz。

This thesis presents three injection locked frequency dividers, the first one is a Divide by 3 ILFD, the second one is a Divide by 2 ILFD and the final one is a Quadrature Divide by 2 ILFD ,first is implemented by using standard TSMC 0.35um and the latter two are implemented by using 0.18um CMOS process respectively.
In the Low Voltage Divide-by-3 ILFD, the ILFD is realized with an NMOS cross-coupled MOSFET LC-tank oscillator with two direct injection MOSFETs across the resonator inductors for signal injection. One level of cross-coupled transistors is used for low voltage and power operation. Measurement results show that at the supply voltage of 1.0 V, the free-running frequency is from 4.83 GHz to 5.21 GHz. At the incident power of 0 dBm, the total locking range is from the incident frequency 14.45 GHz to 15.68 GHz. The power consumption of the ILFD core is 4 mW.
In the Low Voltage Divide-by-2 ILFD, the circuit is realized with a cross-coupled nMOS LC-tank oscillator with an injection MOS. The self-oscillating VCO is injection-locked by second-harmonic input to obtain the division order of two. Measurement results show that at the supply voltage of 0.8V, the free-running frequency is from 3.6 GHz to 4.17 GHz. At the incident power of 0 dBm, the locking range is from the incident frequency 4.1 GHz to 11.2 GHz.
In the Low Voltage Quadrature Divide-by-2 ILFD, the ILFD consists of a new 5.35 GHz QVCO and two NMOS switches, which are in parallel with the QVCO resonators for signal injection. The core power consumption is 5.72mW at the supply voltage of 0.8 V. The free-running frequency of the QILFD is tunable from 5.24 GHz to 5.55GHz. At the input power of 0dBm, the total divide-by-2 locking range is from 8.2 GHz to 13.3 GHz as the tuning voltage is biased at 0.8 V.

[1] J. Roggers, C. Plett, Radio frequency integrated circuit design, Artech House, 2003
[2] B. Razavi, RF microelectronics, Prentice Hall PTR, 1998.
[3] B. Razavi, “A study of phase noise in CMOS oscillators,” IEEE J. Solid-State Circuits, vol. 31, pp. 331-343, 1996
[4] D. Leeson, “A simple model of feedback oscillator noise spectrum,” Proceedings of the IEEE, vol. 54, pp. 329-330, Feb. 1966.
[5] A. Hajimiri and T. H. Lee, “A general theory of phase noise in electrical oscillators,” IEEE J. Solid-State Circuits, vol. 33, no. 2, pp. 179-194, Feb. 1998.
[6] T. Lee and A. Hajimiri, “Oscillator phase noise: a tutorial,” IEEE J. Solid-State Circuits, vol. 35, no. 3, pp. 326-336, Mar. 2000.
[7] A. Hajimiri and T. H. Lee, “Design issues in CMOS differential LC oscillators,” IEEE J. Solid-State Circuits, vol. 34, pp. 717-724, May 1999.
[8] J. N. Burghartz, “Integrated RF and microwave components in BiCMOS technology,” IEEE Trans. Electron Devices, vol. 43, no. 9, pp. 1559-1570, 1996.
[9] Svelto, F. Erratico, P. Manzini, S. Castello, R. Dipt. di Ingegneria, Univ. di Bergamo, Dalmine, “A metal-oxide-semiconductor varactor,” IEEE Electron Device Lett., vol. 20, no. 4, pp. 164-166, Apr. 1999.
[10] P. Andreani, S. Mattisson, “On the use of MOS varactors in RF VCO’s,” IEEE J. Solid-State Circuits, vol. 35, pp. 905-910, June. 2000.
[11] R. L. Bunch, S. Raman, “Large signal analysis of MOS varactors in CMOS -Gm LC VCOs,” IEEE J. Solid-State Circuits, vol. 38, pp. 1325-1332, 2003
[12] J. Aguilera, and R. Berenguer, “Design and test of integrated inductors for RF applications,” Kluwer Academic Publishers, 2004.
[13] J. Craninckx, and M. S. J. Steyaert, “A fully integrated CMOS DCS-1800 frequency synthesizer,” IEEE J. Solid-State Circuits, vol. 33, no. 12, pp. 2054-2065, 1998.
[14] Y. K. Koutsoyannopoulos and Y. Papananos, “Systematic analysis and modeling of integrated inductors and transformers in RF IC design,” IEEE Trans. Circuits and System-II, vol. 47, no. 8, pp. 699-713, 2000.
[15] A . Zolfaghari, A. Chan, and B. Razavi, “Stacked inductors and transformers in CMOS technology,” IEEE J. Solid-State Circuits, vol. 36, no. 4, pp. 620-628, Apr. 2001.
[16] Y. Koutsoyannopoulos, “Novel Si integrated inductor and transformer structure for RF IC design,” Proc. ISCAS , vol. 2, pp. 573-576, June. 1999.
[17] C. Tang, C. Wu, and S. Liu, “Miniature 3-D inductors in standard CMOS process,” IEEE J. Solid-State Circuits, vol. 37, no. 4, pp. 471-480, 2002
[18] H. M. Greenhouse, “Design of planar rectangular microelectronic inductors,” IEEE Trans. on Parts, Hybrids and Packaging, vol. PHP-10, no.2, pp. 101-109, 1974.
[19] J. R. Long, “Monolithic transformers for silicon RF IC design,” IEEE J. Solid-State Circuits, vol. 35, pp. 1368-1382, Sept. 2000.
[20] A. Hajimiri, and T. H. Lee, “The design of low noise oscillators,” Kluwer Academic Publishers, 1999.
[21] B. De Muer, M. Borremans, M. Steyaert, and G. Li Puma, “A 2-GHz low-phase-noise integrated LC-VCO set with flicker-noise upconversion minimization,” IEEE J. Solid-State Circuits, vol. 35, pp. 1034-1038, July. 2000.
[22] S . Levantino, C. Samori, A. Bonfanti, S.L.J. Gierkink, A.L. Lacaita, and V. Boccuzzi, “ Frequency dependence on bias current in 5 GHz CMOS VCOs: impact on tuning range and flicker noise upconversion ” IEEE J. Solid-State Circuits, vol. 37, pp. 1003.1011, Aug. 2002.
[23] Y.-H. Chuang, Chung, S.-L. Jang, and S.-H. Lee, “A wide band injection-locked frequency divider with variable inductor load,” IEEE Microw. Wireless Compon. Lett., 17 (2007), pp. 460-462, June. 2007.
[24] Jeong, S. Kim, W. Choi, H. Noh, K. Lee, K.-S. Seo, and Y. Kwon, “W-band divide-by-3 frequency divider using 0.1 μm InAlAs/InGaAs metamorphic HEMT technology,” Electronics Letts., vol. 41, pp.1005-1006. Sept. 2005.
[25] S.-L. Jang, W. Yeh and C.-F. Lee, “A low power CMOS divide-by-3 LC-tank injection-locked frequency divider,” Microwave and Optical Technology Lett., vol. 50, pp. 259-262, June. 2007.
[26] S.-L. Jang, C.-F. Lee, and W.-H. Yeh “A divide-by-3 injection-locked frequency divider with single-ended input,” IEEE Microw. Wireless Compon. Lett., no.18, pp. 142-144, Feb. 2008.
[27] C.-F. Lee and S.-L. Jang, “A novel divide-by-3 Hartley injection-locked frequency divider,”Microwave and Optical Technology Lett., vol. 50, pp. 906-909. sept. 2007.
[28] H. Wu and L. Zhang, “A 16-to-18 GHz 0.18 μm Epi-CMOS divide-by-3 injection-locked frequency divider,” in IEEE ISSCC 2006 Dig. Tech. Papers, pp. 27-29, Feb. 2006.
[29] S.-L. Jang, C.-W. Tai, and C.-F. Lee, “Divide-by-3 injection-locked frequency divider implemented with active inductor,”Microwave and Optical Technology Lett., vol. 50, pp. 1682-1685, Nov. 2007.
[30] P. Wambacq and W. Sansen, Distortion Analysis of Analog Integrated Circuits, Dor drecht: Kluwer, 1998.
[31] S.-L. Jang, W.-C. Chen, and C.-F. Lee, “Divide-by-3 LC injection-locked frequency divider with inductor over MOS topology,” Microwave and Optical Technology Lett., vol. 50, pp. 988-992, Sept. 2007.
[32] Y.-H. Chuang, S.-H. Lee, R.-H. Yen, S.-L. Jang, J.-F. Lee and M.-H. Juang, “A wide locking range and low voltage CMOS direct injection-locked frequency divider,” IEEE Microw. Wireless Compon. Lett., vol. 16, no. 5, pp. 299-301, May 2006.
[33] H. Wu and A. Hajimiri, “A 19 GHz 0.5 mW 0.35 μm CMOS frequency divider with shunt-peaking locking-range enhancement,” ISSCC Digest of Tech. Papers. pp. 412-413, Feb. 2001.
[34] S.-L. Jang, and C.-F. Lee , “A wide locking range LC-tank injection-locked frequency divider,” IEEE Microw. Wireless Compon. Lett., pp.613-615, Aug. 2007.
[35] M. Tiebout, “A CMOS direct injection-locked oscillator topology as high-frequency low-power frequency divider,” IEEE J. Solid-State Circuits, vol. 39, pp. 1170-1174, July 2004.
[36] H. R. Rategh and T. H. Lee, “Superharmonic injection-locked frequency dividers,” IEEE J. Solid-State Circuits, vol. 34, pp. 813-821, June 1999.
[37] J. Lee and B. Razavi, “A 40 GHz frequency divider in 0.18-μm CMOS technology,” Symp. VLSI Circuits Dig. Tech. Papers, pp. 259-262, June 2003.
[38] B. Razavi, “A study of injection locking and pulling in oscillators,” IEEE J. Solid-State Circuits, vol. 39, no. 9, pp. 1415-1424, Sept. 2004.
[39] A. Mazzanti, P. Uggetti, and F. Svelto, “Analysis and design of injection-locked LC dividers for quadrature generation,” IEEE J. Solid-State Circuits, vol. 39, pp. 1425-1433, Sept. 2004.
[40] E. Hegazi, H. Sjoland, and A.A. Abidi, “A filtering technique to lower LC oscillator phase noise,” IEEE J. Solid-State Circuits, vol.36, no. 12, pp. 1921-1930, Dec. 2001.
[41] P. Andreani, A. Bonfanti, L. Romano, and C. Samori, “Analysis and design of a 1.8-GHz CMOS LC quadrature VCO,” IEEE J. Solid-State Circuits, vol. 37, no. 12, pp. 1737-1747, Dec. 2002
[42] S.-L. Jang, Y.-H. Chung, S.-H. Lee, L.-R. Chi, and J.-F. Lee, “An integrated 5/2.5GHz direct injection-locked quadrature LC VCO,” IEEE Microw. Wireless Compon. Lett., pp.142-144, Feb. 2007.
[43] S.-L. Jang, Y.-H. Chuang, S.-H. Lee and Y.-H. Chiang, “A current reused CMOS quadrature injection-locked frequency divider,” Microwave and Optical Technology Lett., pp.1804-1806, Aug. 2007.
[44] S.-L. Jang, C.-C. Liu, and J.-F. Huang “A wide locking range quadrature injection-locked frequency divider with tunable active inductor,” IEICE Trans. Electron., vol.E91-C, no.3, pp. 373-377, Mar. 2008.
[45] S.-L. Jang, Y.-H. Chuang, S.-H. Lee and Y.-H. Chiang, “A quadrature CMOS current reused injection-locked frequency divider,” Microwave and Optical Tec.y Lett., pp.1804-1806, Aug. 2007.
[46] S.-L. Jang, C.-W. Chang, S.-C. Wu, C.-F. Lee, L.-Y. Tsai,and J.-F. Huang, “Quadrature Hartley VCO and injection-locked frequency divider,” in press, IEICE Trans. Electron., vol.E91-C, no.8, pp.-, Aug. 2008.
[47] B. Razavi, “A study of injection locking and pulling in oscillators,” IEEE J. Solid-State Circuits, vol. 39, no. 9, pp. 1415-1424, Sept. 2004.