在本篇論文中，提出了應用於生理訊號感測裝置或物聯網系統之低雜訊放大
器與低功耗穩壓器。為了達到可重組化與低功耗，懸浮閘技術被採用於電路中。
在生醫領域或物聯網應用中，提高放大器的動態範圍，能夠降低訊號的失
真，有利於訊號的分析與判讀。本論文提出了一個懸浮閘平衡型虛擬電阻，利用
電容分壓的方式，使電晶體的閘極端電壓為其源極與集極的平均值，相較於其他
文獻使用之虛擬電阻擁有較高的線性度，並且顯著地改善了電容式回授放大器在
低頻時的線性度與動態範圍。本論文所提出的低雜訊放大器在供給電壓為2.5 V、
靜態電流為3.6 u A 與頻寬為10 kHz 下，動態範圍可以達到63.7 dB。另外，雜訊
效率因素在100Hz、10 kHz 與100 kHz 的頻寬設定下，分別為1.88、1.93 與2.05。
為了提供生理訊號感測或物聯網應用中的裝置穩定電壓，本論文提出一個由
懸浮閘nMOS 導通電晶體、自適性AB 類放大器與懸浮閘電容回授和參考電壓
所組成的低功耗穩壓器。懸浮閘nMOS 導通電晶體改善穩壓器的電源雜訊抑制
能力，並保有低壓降的特性；另外，自適性AB 類放大器提高了穩壓器的反應速
度，且擁有很低的功耗；最後，懸浮閘電容回授和參考電壓的採用，使本論文提
出之穩壓器不需要能隙電路來產生參考電壓，藉由調整懸浮閘內的電荷，達到輸
出電壓可編程的特性。從量測資料顯示，穩壓器的輸出電壓為1.2 V 至2.5 V，靜
態電流低於1 u A，擁有-75 dB 的電源雜訊抑制能力。在200 mV 的電壓降下，電
流效率高於99.96%。當附載電流為200 uA 時，穩壓器的最大附載電容可以達到
50 nF。不採用能隙參考電路，本論文提出之穩壓器溫度係數為100ppm/◦C。

Two reconfigurable power-efficient high-performance circuits, a low-noise amplifier and a linear voltage regulator, are proposed in this thesis, targeting sensing and monitoring devices for biomedical applications and for internet of things (IoT). Floating-gate transistors are employed to enable reconfigurability and to achieve low power consumption. In the proposed low-noise amplifier, a floating-gate based pseudo resistor is proposed to substantially improve circuit linearity as well as dynamic range at low frequencies. The pseudo resistor is made of a floating-gate transistor, of which gate voltage is kept the mean value of the drain and the source voltages. In this manner, the achieved dynamic range is more than 62.8 dB with total harmonic distortion better than 60 dB across the whole bandwidth. Using a supply voltage of 2.5 V, an amplifier consumes 3.6 uA of current to achieve a bandwidth of 10 kHz with a dynamic range of 63.7 dB. From measurements, the noise efficiency factors corresponding to the bandwidth settings of 100Hz, 1 kHz, and 10 kHz are 1.88, 1.93, and 2.05, respectively.

A reconfigurable low-power high-performance output-capacitor-less low-drop-out (LDO) voltage regulator is also proposed in this thesis. This LDO consists of a floatinggate nMOS pass transistor, an adaptively biased error amplifier with a class-AB input stage, and capacitive circuits for voltage reference generation and output feedback sensing. Consequently, the LDO can achieve a low drop-out voltage of one VDSsat, high power supply rejection, fast transient responses with low quiescent current, and programmable output voltage and rejection bandwidth. From the measurements, with the quiescent current level below 1 uA, the maximum load current is 2.5 mA with a drop-out-voltage of 200 mV. The pogrammable output range is 1.8 V to 2.5 V with power supply rejection of -75 dB. The current efficiency is higher than 99:96%. The maximum output load capacitance can be as large as 50 nF under the condition of 200 A load current. Without using a bandgap reference circuit, the measured output voltage temperature coefficient is 100ppm/◦C.

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