本論文研究應用於晶片間光互連的積體電路，利用台積電(TSMC)之0.35μm SiGe 3P3M製程和0.18μm CMOS 1P6M製程來設計積體電路。文中探討三個主題，矽鍺發光與矽鍺檢光晶片、可調轉阻放大器與光接收前端電路。
第一部分探討兩個主題，使用的是台積電0.35μm SiGe 3P3M製程，第一為矽鍺發光元件的研製，採用串聯及並聯佈局結構來研究矽鍺發光晶片的發光特性，設計的PN接面矽鍺發光晶片，在並聯架構PN間距0.6μm有著最佳的發光特性。第二為矽鍺檢光晶片的設計，在紅光、綠光、藍光為光源下，以紅光接收效果最好。
第二部份為可調轉阻放大器之設計，使用的是台積電0.18μm CMOS 1P6M製程，功率消耗在1.8V供應電壓下為7.2mW，增益可調範圍30.4~40 dBΩ，在光檢測器寄生電容250fF下的-3dB頻寬為4.5GHz。
第三部分為光接收前端電路設計，使用的是台積電0.18μm CMOS 1P6M製程，電路架構包含差動式轉阻放大器以及限幅放大器，功率消耗在不含buffer的情況，1.8V供應電壓下為12.6mW，增益可調範圍75.5~86.2 dBΩ，當光檢測器寄生電容為250fF、時脈資料回復電路負載電容為100fF時，-3dB頻寬為1.5GHz。

In this thesis, a study is made of the integration circuits for the chip-to-chip optical interconnect. The integration circuits are designed using the TSMC's 0.35μm SiGe 3P3M technology and the 0.18μm CMOS 1P6M technology. There are three parts in this study, the SiGe light emission and photo detector, a tunable transimpedance amplifier, and an optical receiving front-end circuit.
In the first part, the TSMC 0.35μm SiGe 3P3M technology is adopted to study two topics. The first topic deals with the development of SiGe light-emitting chip. Series and parallel structures are used here to study the light emission property of light-emitting chip. It is found that the SiGe light-emitting chip designed with PN junctions has the best light emission power for the PN junction with a distance of 0.6μm in the parallel structure. The second topic is about the SiGe photo detector. It is found that when the red light, green light, and blue light are used as the light sources, the best performance is obtained for the red light.
In the second part, the design of a tunable transimpedance amplifier (TIA) circuit is presented using the TSMC 0.18μm CMOS 1P6M CMOS technology. The power consumption is 7.2mW from a 1.8-V supply voltage, the fabricated TIA exhibits a gain variable from 30.4 to 40 dBΩ, the -3dB bandwidth is 4.5GHz for a photodiode capacitance of 0.25pF.
The third part deals with the design of an optical receiver front-end circuit using the TSMC 0.18μm CMOS 1P6M technology. The circuit structure consists of a differential transimpedance amplifier and a limiting amplifier. Without buffer, the power consumption is 12.6mW from a 1.8-V supply voltage, the fabricated TIA-LA exhibits a gain variable from 75.5 to 86.2 dBΩ, the -3dB bandwidth of 1.5GHz for a photo detector capacitance of 0.25pF and a CDR load capacitance of 0.1pF.

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