注入鎖定除頻器之研究｜國立臺灣科技大學博碩士論文系統

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研究生：	呂沛檄 Pei-Xi Lu
論文名稱：	注入鎖定除頻器之研究 Design of Injection-Locked Frequency Dividers
指導教授：	張勝良 Sheng-Lyang Jang
口試委員:	徐敬文 Ching-Wen Hsue 黃進芳 Jhin-Fang Huang 鄧恆發 Heng-Fa Teng 莊昀學 Yun-Hsueh Chuang
學位類別：	碩士 Master
系所名稱：	電資學院 - 電子工程系 Department of Electronic and Computer Engineering
論文出版年：	2008
畢業學年度：	96
語文別：	英文
論文頁數：	110
中文關鍵詞：	除頻器、壓控震盪器、金氧半電晶體
外文關鍵詞：	divider, vco, CMOS
相關次數：	點閱：204 下載：2
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此論文提出了三個注入鎖定除頻器(ILFDs)一個晶片天線結合壓控振盪器(VCO)，它們分別使用了標準台積電0.18微米和0.35微米CMOS製程去實現。
第一個電路是使用兩相位寬鎖頻範圍之注入鎖定除頻器，用此電路來探討如何達到寬的鎖頻範圍。在ILFD電壓為1.35V時，可調頻率為3.77到3.9GHz。在注入信號功率為0dBm時鎖頻範圍為5.6到10.2GHz。且在ILFD電壓為1.35V時，消耗功率為2.7mW,本電路在可調電壓為1.2V時相位雜訊為-112.0dBc/Hz，當注入0dBm的訊號時相位雜訊為-128.0dBc/Hz。另一為四相位寬鎖頻範圍之注入鎖定除頻器，可調頻率為3.6到4.282GHz而當注入訊號為0dBm時鎖頻範圍為4.2到9GHz，此四相位注入鎖定除頻器在電壓為1.4V時消耗功率為7.91mW，此電路是使用台積電0.18μm製程。
第三個電路是一個是創新架構注入鎖定除三電路，此電路由0.35μm CMOS製程，電路全部為pMOS所組成，在交互耦合pMOS與注入pMOS中間加入一變壓器式電感，在電壓為2V可調頻率為2.433到2.79GHz，而當注入訊號功率為0dBm時鎖頻範圍為7.17 GHz 到8.3 GHz，大約1.13GHz.此電路消耗功率為8.64mW。
最後一個電路是由互補式壓控振盪器使用0.18μm製程，將傳統的壓控振盪器的電感用迴路天線取代，當電路的電壓為1.9V時電路的可調範圍為4.901 GHz 到4.988 GHz。迴路天線約可傳輸0.7公尺，此電路的消耗功率為19.95mW。

This thesis presents three injection locked frequency dividers and one integrated chip antenna voltage controlled oscillator.
The proposed wideband injection locked frequency divider (ILFD) and describes the techniques to widen the locking ranges of the ILFD. At the supply voltage of 1.35V, the tuning range of the free running ILFD is from 3.77GHz to 3.90 GHz and the locking range of the ILFD is 4.6GHz, from 5.6 to 10.2GHz at the injection signal power of 0dBm. The ILFD dissipates 2.7mW at supply voltage of 1.35V and was fabricated in the TSMC 1P6M 0.18μm CMOS process. At the tuning voltage of 1.2V, the measured phase noise of free running ILFD is about -112.0dBc/Hz at 1MHz offset frequency from 3.89GHz and the phase noise of the locked ILFD is about -128.0dBc/Hz, while the input signal is with a power of 0dBm., the second ILFD is a quadrature wide locking range ILFD, the measurement shows the tuning range is 3.6 ~ 4.282GHz and the locking range is from 4.2 ~ 9 GHz when the injection input power is 0 dBm, the quadrature ILFD dissipates 7.91mW at supply voltage of 1.4V and was fabricated in the TSMC 1P6M 0.18μum CMOS process.
The third circuit is a new divide-by-3 ILFD fabricated in the 0.35μm CMOS 2P4M CMOS technology. The divider consists of a pMOS cross-coupled LC oscillator, two injection MOSFETs and a transformer staggered in between the cross-coupled pMOSFETs and injection FETs, and the LC resonator is composed of two inductors and varactors. The injection FET uses the transformer load to increase the locking range. At the supply voltage of 2V, the divider free-running frequency is tunable from 2.433 to 2.79 GHz, and at the incident power of 0 dBm the locking range is about 1.13 GHz, from the incident frequency 7.17 to 8.3GHz. The core power consumption is 8.64mW.
Last chip is a complementary VCO fabricated in the 0.18μm CMOS, the VCO’s inductor to replace the loop antenna, At the supply voltage of 1.9V, the measurement shows tuning range from 4.9 ~ 4.988 GHz, the loop antenna radiate distance about 0.7m. The core power consumption is 19.95mW.

中文摘要	I
ABSTRACT	III
誌謝	V
LIST OF FIGURES	VIII
LIST OF TABLES	XII
CHAPTER 1   INTRODUCTION	1
1 BACKGROUND	1
2 PLL ARCHITECTURE	2
3 OVERVIEW OF THIS THESIS	4
CHAPTER 2  THE THEOREM OF OSCILLATORS	5
1 BASIC THEORY OF OSCILLATORS	5
1.1 TWO-PORT (FEEDBACK) VIEW	5
1.2 ONE-PORT (NEGATIVE RESISTANCE) VIEW	7
2 QUALITY FACTOR (Q)	9
3 PHASE NOISE (PN)	12
4 CAPACITOR AND VARACTOR	17
4.1 CAPACITORS	17
4.2 VARACTORS	19
5 INDUCTOR AND TRANSFORMER	26
5.1 INDUCTOR	26
5.2 TRANSFORMER	35
6 OSCILLATOR AND PARAMETER OF VCO	40
6.1 CROSS COUPLE OSCILLATOR	40
6.2 PARAMETER OF VCO	41
7 REFERENCES	45
CHAPTER 3  THEORY OF INJECTION LOCKED FREQUENCY DIVIDER	47
1 INTRODUCTION	47
2 CLASSIFICATION OF ANALOG FREQUENCY DIVIDERS	48
3 CLASSIFICATION OF ILFDS	49
4 TOPOLOGY OF DIVIDE-BY-2 ILFD	52
5 REFERENCES	53

CHAPTER 4  A WIDE LOCKING RANGE INJECTION LOCKED FREQUENCY  DIVIDER	54
1 INTRODUCTION	54
2 CIRCUIT DESIGN	56
3 MEASUREMENT RESULTS	61
4 CONCLUSION	66
5 QUADRATURE ILFD	67
6 REFERENCES	72
CHAPTER 5   DIVIDE-BY-3 LC INJECTION LOCKED FREQUENCY DIVIDER    WITH  A TRANSFORMER AS AN INJECTION LOAD	74
1 INTRODUCTION	74
2 OPERATION PRINCIPLE OF THE DIVIDE-BY-3 ILFD	75
3 MEASUREMENT RESULTS	79
4 CONCLUSION	82
5 REFERENCES	83
CHAPTER 6  INTEGRATED CHIP ANTENNA VCO	84
1 INTRODUCTION	84
2 SIMULATION OF LOOP ANTENNA	86
3 CIRCUIT DESIGN OF VCO	90
4 MEASUREMENT RESULTS	93
5 CONCLUSION	95
6 REFERENCES	95
CHAPTER 7  CONCLUSIONS	97

                                

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