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研究生: 林彥霖
Lin-Yen Lin
論文名稱: 數位控制應用於低輸入電流漣波非對稱全橋轉換器
Input Current Ripple Reduction Asymmetrical Full Bridge Converter with Digital Control
指導教授: 呂錦山
Ching-Shan Leu
口試委員: 謝耀慶
Yao-Ching Hsieh
林景源
Jing-Yuan Lin
學位類別: 碩士
Master
系所名稱: 電資學院 - 電機工程系
Department of Electrical Engineering
論文出版年: 2016
畢業學年度: 104
語文別: 英文
論文頁數: 65
中文關鍵詞: 非對稱全橋減小輸入電流漣波零電壓切換數位控制
外文關鍵詞: asymmetrical full bridge, input current ripple reduction, zero voltage switching, digital signal processors.
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  • 直流對直流電能轉換器擁有高效率、高功率密度在近期被高度要求。全橋轉換器因為擁有低電壓低電流開關應力,因此在高輸入電壓與高功率應用下非常適合。然而傳統對稱控制全橋轉換器因為有變動的死區時間,產生極大的切換損失使得功率密度受到限制。因此,固定死區時間控制器,如相移控制器被廣泛用於全橋轉換器。傳統的相移控制器具有由脈動輸入電流波,到目前為止導致最後須加入大的電磁干擾濾波器,為了降低傳統相移全橋轉換器的輸入電流漣波和達成零電壓切換,因此提出低輸入電流漣波相移全橋轉換器。
    相移控制的循環損失不但造成導通損失的增加也造成轉換器效率下降,為了消除此問題,非對稱控制是比相移控制較佳的控制方式。因此產生本研究動機提出低輸入電流漣波非對稱全橋轉換器。
    為了實現全範圍零電壓切換,死區時間需要與不同的負載而變化,使用類比電路無法做到這一點,而數位控制即可,利用輸入電壓範圍為300到400伏、輸出功率為24伏15安培、操作頻率為100k赫茲的規格來執行電路分析,以及利用實驗測試操作原理,來展現轉換器的可行性。


    DC-DC converters with a high efficiency and high power density are currently in high demand. Full-bridge converters (FB) exhibit high efficiency owing to their low voltage and current stress, making them suitable for high-input-voltage and high-power-conversion applications. Employing conventional symmetrical control schemes, however, FB converters have large switching losses because of their variable dead-time. Therefore, their power densities are limited.
    Accordingly, fixed dead-time controllers such as phase-shift controllers are widely used for FB converters. Inheriting the characteristics of a Buck converter, a conventional phase-shift controller has large di/dt noise that is generated by the pulsating input current waveform. As a result, a larger electromagnetic interference (EMI) filter must be added, which is the only proposed solution so far.
    To reduce the input current ripple of a phase-shift full-bridge converter (PSFB) with ZVS, the proposed input current ripple reduction PSFB converter.
    Moreover, there is circulation loss with phase-shift control, which increases the conduction loss and limits the efficiency performance. To alleviate this problem, an asymmetrical control was selected which also provides a fixed dead-time so that ZVS operation can be achieved
    Therefore, an asymmetrical full bridge converter (AFB) with ZVS operation and low input current ripple are requested, which has not been explored yet. It becomes the motivation of this research and an Input Current Ripple Reduction Asymmetrical Full Bridge converter (RR-AFB) is thus proposed.
    To achieve ZVS for all load ranges using RR-AFB converter, the dead-time needs to vary with different loads. Operation using an analog controller cannot accomplish this, whereas digital controllers can. The design and implementations of a digital controller for the DC-DC converters were achieved by using digital signal processors (DSP).
    To demonstrate the feasibility of the converter, the operational principle was experimentally tested, and circuit analysis was performed on the proposed converters at an operating frequency of 100 kHz, an input voltage range of 300-400V, and an output power of 24V/1.5-15A.

    Abstract Acknowledgements Table of Contents List of Figures List of Table Chapter 1 Introduction 1.1 Background and Motivation 1.2 Objectives of the Thesis 1.3 Organization of the Thesis Chapter 2 Input Current Ripple Reduction Asymmetrical Full Bridge Converter (RR-AFB) 2.1 Introduction 2.2 Operational Principle 2.3 Circuit Analysis 2.3.1 Voltage gain 2.3.2 Transformer DC-bias current 2.3.3 Zero voltage switching conditions 2.3.4 Input current ripple 2.3.5 Duty cycle loss 2.4 Circuit Design 2.4.1 Transformer design 2.4.2 Output inductor 2.4.3 Output capacitor 2.4.4 Clamping capacitors (CC1 and CC2) 2.4.5 Power switches of circuit 2.4.6 Output rectifier diodes of circuit 2.5 Experimental Results 2.6 Summary Chapter 3 Design and Implementation of Digital Controller 3.1 Introduction 3.2 Design of Digital Control 3.2.1 TMS320F28035 microcontroller 3.2.2 Analog-to-Digital Conversion (ADC) 3.2.3 Enhanced Pulse-Width-Modulator (EPWM) 3.2.4 The Flowchart of Digital Control 3.3 Digital Compensator 3.4 Experimental Results 3.5 Summary Chapter 4 Conclusions and Future Research 4.1 Conclusions 4.2 Future Researches References Vita

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