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研究生: 吳易庭
Yi-Ting Wu
論文名稱: 具最佳化暫態響應開關時間之自適應導通時間降壓轉換器
An Adaptive On-Time Buck Converter with Optimized On-Time for Transient Response
指導教授: 彭盛裕
Sheng-Yu Peng
口試委員: 謝秉璇
Ping-Hsuan Hsieh
林景源
Jing-Yuan Lin
學位類別: 碩士
Master
系所名稱: 電資學院 - 電機工程系
Department of Electrical Engineering
論文出版年: 2023
畢業學年度: 112
語文別: 英文
論文頁數: 70
中文關鍵詞: 降壓型電源轉換器直流轉換器 電容電流回授控制自適應導通時間控制暫態響應最佳化
外文關鍵詞: Buck Converter, DC/DC Converter, Capacitor Current Feedback Control, Adaptive On-Time Control, Transient Response Optimization
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  • 微處理器 (如中央處理器 (CPU) 及圖形處理器 (GPU)) 經常需要在待機模式及效能
    模式間頻繁切換,因此,如何縮短由短時間大範圍的負載電流變化所造成的輸出
    電壓暫態穩定時間便成為一個重要的議題。為解決上述問題,本論文使用電容電
    流訊號作為系統回授訊號,藉此達到相比於其他同類型架構之定導通時間控制降
    壓型轉換器更快速的暫態響應,同時,本篇論文也提出一種可應用於自適應導通
    時間降壓型轉換器的最佳化開關導通時間控制電路,此控制電路能使轉換器根據
    輸出入電壓變動自動調整開關導通時間,藉此達到暫態穩定時間最佳化的效果,
    同時也改善了先前相關研究的缺點,在新增針對負載電流從重載到輕載的最佳化
    開關控制電路同時保持極低的靜態電流,上述所提出之降壓轉換器使用台積電
    0.18um BCD 製程,從模擬波型來看,最佳化暫態響應開關時間控制能有效縮短降
    載或加載時所造成的輸出電壓暫態穩定時間,並且能自動根據輸出電壓的改變而
    調整最佳化開關時間。


    Microprocessors, such as Central Processing Units (CPUs) and Graphics Processing Units(GPUs), often require frequent switching between standby and performance modes. Therefore, addressing the challenge of reducing transient settling time caused by short-duration, wide-range variations in load current has become crucial. To tackle this issue, this thesis utilizes the capacitor current signal as a system feedback signal, aiming to achieve faster
    transient responses compared to other similar architectures that use constant on-time control. Additionally, this thesis introduces an optimized on-time control (OOTC) circuit. This control circuit automatically adjusts the switch’s on-time based on input and output voltage conditions to optimize output transients. It also mitigates the drawbacks of previous research by adding an optimized on-time control (OOTC) circuit for load currents changing from heavy load to light load, maintaining extremely low static currents. The proposed buck converter uses the TSMC 0.18um BCD process. From the simulation waveforms, it can be observed that the optimized on-time control effectively reduces transient settling time during load transients and automatically adjusts the optimized on-time based on the output voltage condition.

    Recommendation Letter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i Approval Letter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ii Abstract in Chinese . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iii Abstract in English . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iv Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . viii List of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xiii 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.1 Voltage Regulators (VRs) for Computer Applications . . . . . . . . . . . 1 1.2 Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 1.3 Thesis Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2 Review of Constant On-Time Buck and Transient Optimized Control . . . . . . 5 2.1 Review of Constant On-Time control . . . . . . . . . . . . . . . . . . . . 5 2.1.1 Introduction of Ripple-Based Constant On-time (RBCOT) Control 5 2.1.2 Control Schemes for Addressing Sub-Harmonic Instability and DC Offset Issues . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.2 Transient Optimized Controls . . . . . . . . . . . . . . . . . . . . . . . . 14 2.2.1 Review of Transient Optimized Controls . . . . . . . . . . . . . 14 3 Proposed Capacitor Current Feedback Adaptive On-time Buck Converter . . . 17 3.1 Circuit Diagram of Adaptive On-time Buck Converter with the Proposed Controls . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.2 State Diagram and Detection Mechanism . . . . . . . . . . . . . . . . . 20 4 Circuit Implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 4.1 Capacitor Current Sensor . . . . . . . . . . . . . . . . . . . . . . . . . . 29 4.1.1 Circuit Diagram and Output Impedance Derivation . . . . . . . . 29 4.1.2 Amplifier Structure and Specification . . . . . . . . . . . . . . . 33 4.2 Square Root Current Generator . . . . . . . . . . . . . . . . . . . . . . . 36 4.3 Voltage Reference Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . 40 5 Simulation Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 5.1 Post-Simulation Result of Sub-circuits . . . . . . . . . . . . . . . . . . . 46 5.1.1 Post-Simulation Result of OPAMP . . . . . . . . . . . . . . . . . 46 5.1.2 Post-Simulation Result of The Proposed Voltage Reference Circuit 48 5.2 Post-Simulation Result of The Proposed Buck Converter . . . . . . . . . 48 5.3 Pre-Simulation of The Proposed Buck Converter . . . . . . . . . . . . . 50 6 Conclusions and Future Works . . . . . . . . . . . . . . . . . . . . . . . . . . 65 6.1 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 6.2 Future Works . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67

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