熱載子效應在不同閘極厚度間電容交叉耦合注入鎖定四相位除頻器研究

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研究生：	黃順源 OSEL - NOVANDI WITOHENDRO
論文名稱：	熱載子效應在不同閘極厚度間電容交叉耦合注入鎖定四相位除頻器研究 Hot Carrier Effect Research on Thick-Thin Gate ILFD and Study on Capacitive Cross-Coupled QILFD
指導教授：	張勝良 Sheng-Lyang Jang
口試委員:	徐敬文 Ching-Wen Hsue 賴文政 Wen-Cheng Lai 黃進芳 Jhin-Fang Huang
學位類別：	碩士 Master
系所名稱：	電資學院 - 電子工程系 Department of Electronic and Computer Engineering
論文出版年：	2016
畢業學年度：	104
語文別：	英文
論文頁數：	77
中文關鍵詞：	注入鎖定式除頻器、熱載子效應、四相位注入鎖定除頻器
外文關鍵詞：	Injection Locked Frequency Divider, Hot Carrier, QILFD
相關次數：	點閱：352 下載：1
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本文提出 2 種注入鎖定除 2 架構熱載子的實驗條件下，在交錯耦合電晶體間兩閘
極的厚薄度加以比較，可以發現到熱載子壓力的退化程度，在交錯耦合電晶體在不同
電壓注入，功耗愈大時鎖頻範圍愈小，反之，功耗愈小時鎖頻範圍愈大，得到此最大
的鎖頻範圍是閘極偏壓達到最佳值，從這實驗中成功地看出鎖頻範圍的變化。
注入鎖定除 2 除頻器用電容交錯耦合方式進行研究，用環形耦合方式得到有四相
位輸出，此最高的優化指數為 3.78 在 VDD=0.85V，VR=0.8V，鎖頻範圍在 9.1 到
12.8GHz，最低功耗 7.39mW 在 VDD=0.7V，VR=0.8V，優化指數 3.44，鎖頻範圍 9.6 到
12.4GHz，較高的鎖頻範圍在 VDD=1V，VR=1.1V，優化指數 1.81 和鎖頻範圍 8.6 到
13.7GHz，此功耗可透過改變開關晶體管的閘極偏壓來控制，此四相位注入鎖定除頻
器運用在 VDD < VR在條件下，較高的優化指數仍然需要在 VDD > VR的條件下。

Two divide-by-2 cross-coupled Injection Locked Frequency Dividers (ILFD) have
been put under experimental stress conditions. Comparison of stress effects is made between
thick-gate cross-coupled transistors and thin-gate cross-coupled transistors. Degradations due
to hot-carrier stress have been found. The cross-coupled MOSFETs have different effect on
power consumption than the injection MOSFET, increasing it while the latter is decreasing it.
Increase in output power, decrease in locking range and optimal gate bias shifting to a higher
level are observed as contribution from injection MOSFET’s degradation. The experiment
successfully isolate the effect of stress-degraded injection MOSFET.
An LC-tank divide-by-2 Quadrature ILFD (QILFD) using the capacitive cross-coupled
oscillator has been studied. The quadrature operation is obtained by ring transformer coupling.
The highest FOM achieved is 3.78 at VDD = 0.85V, VR = 0.8V, with locking range from 9.1 to
12.8 GHz. The lowest power consumption is 7.39mW at VDD = 0.7V, VR = 0.8V, with FOM of
3.44 and locking range from 9.6 to 12.4 GHz. The widest locking range is achieved at VDD =
1V, VR = 1.1V, with FOM of 1.81 and locking range from 8.6 to 13.7GHz. The power
consumption can be controlled by changing the gate bias (VR) of switching transistors. The
QILFD can operate at VDD < VR conditions. Higher Figure of Merit (FoM) still require VDD >
VR condition.

中文摘要 ...................................................................................................................................I
ABSTRACT.............................................................................................................................. II
ACKNOWLEDGEMENTS.....................................................................................................III
TABLE OF CONTENTS.........................................................................................................IV
LIST OF FIGURES .................................................................................................................VI
LIST OF TABLES....................................................................................................................X
INTRODUCTION .....................................................................................................................1
1.1 BACKGROUND..............................................................................................................1
1.2 THESIS ORGANIZATION................................................................................................3
FUNDAMENTAL THEORIES.................................................................................................4
2.1 PASSIVE ELEMENTS .....................................................................................................4
2.1.1 RESISTORS ................................................................................................................4
2.1.2 CAPACITORS .............................................................................................................5
2.1.3 INDUCTORS...............................................................................................................9
2.2 VOLTAGE CONTROLLED OSCILLATOR (VCO)............................................................11
2.2.1 GENERAL VCO.......................................................................................................14
2.2.2 LC-TANK OSCILLATORS.........................................................................................17
2.2.3 VCO CHARACTERISTIC PARAMETERS ....................................................................19
2.2.4 QUADRATURE SIGNAL GENERATION ......................................................................24
2.3 INJECTION LOCKED FREQUENCY DIVIDER (ILFD).....................................................25
2.3.1 BASIC PRINCIPLE ....................................................................................................26
2.3.2 LOCKING RANGE ....................................................................................................27
2.3.3 QUADRATURE INJECTION LOCKED FREQUENCY DIVIDER (QILFD) .......................29
2.4 HOT CARRIER EFFECT................................................................................................30
HOT CARRIER EFFECT ON THICK GATE ILFD-BY-2....................................................32
3.1 INTRODUCTION ..........................................................................................................32
3.2 CIRCUIT DESIGN ........................................................................................................33
3.3 MEASUREMENT RESULT ............................................................................................34V
HOT CARRIER EFFECT ON THIN GATE ILFD-BY-2 ......................................................43
4.1 CIRCUIT DESIGN ........................................................................................................43
4.2 MEASUREMENT RESULT ............................................................................................43
CAPACITIVE CROSS-COUPLED QILFD ...........................................................................52
5.1 INTRODUCTION ..........................................................................................................52
5.2 CIRCUIT DESIGN....................................................................................52
5.3 MEASUREMENT RESULT......................................................................54
CONCLUSIONS......................................63
REFERENCES ........................................64

                                

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