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作者姓名(中文):喻韜
作者姓名(英文):Tao - Yu
論文名稱(中文):跨產業鏈方法之專利趨勢分析-以金屬氧化物型電阻式記憶體為例
論文名稱(外文):Industry Chain based Patent Trend Analysis-Using Metal Oxide Resistive RAM as an Example
指導教授姓名(中文):蔡鴻文
指導教授姓名(英文):Hung-Wen Tsai
口試委員姓名(中文):管中徽
何家驊
口試委員姓名(英文):Chung-Huei Kuan
C. H. Ho
學位類別:碩士
校院名稱:國立臺灣科技大學
系所名稱:專利研究所
學號:M10024013
出版年(民國):102
畢業學年度:101
學期:2
語文別:中文
論文頁數:99
中文關鍵詞:跨產業鏈專利分析金屬氧化物型電阻式記憶體
外文關鍵詞:cross industry chainpatent analysismetal oxide resistive memory
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專利分析對於專利布局而言是相當重要的事前調查,原因在於分析特定技術領域的專利趨勢,企業可以審視欲申請專利的新穎性;而說明書撰稿人則可以衡量一發明是否符合進步性要求。對企業體每一項產品的研發都所費不貲,當然會利用專利保護自己的技術創意,更重要的是,一旦產品上市卻遭到專利侵權訴訟的延宕,對於企業的形象、經營都是極大的打擊,因此事前調查對於欲推出產品相關領域的專利概況尤其重要。
以目前台灣的電子產業來說,近來專利訴訟不斷,突顯了企業體在專利方面事前準備的不足,但對於幾乎是三個月一世代的電子產業、各企業皆持有專利數量龐大的情形下,專利地圖製作起來相當費時費力而且需要大量人力,經常令人難以決定是否有進行的必要。
專利趨勢分析可以提供前期資訊,幫助決定是否在特定專利群中,逐一定義個別專利所揭露的技術,及其所達成的功效。趨勢分析結合技術及市場資訊更可以揭露一個技術領域中技術發展的概況、對手企業動向,以提供企業技術研發及市場經營的方向。
本研究以金屬氧化物電阻式記憶體為例,提出一種適用於電子產業的調查方式,便於對於專利趨勢與具影響力的專利本身快速評估,具體方式則是以產業環節做為觀點的產業鏈方式進行專利分析,並且與以引證數量作為指標的傳統方式進行比較。就方法論而言,本研究提出的專利趨勢分析流程特色在於快速、簡單、而且步驟明確,更重要的是本研究以專利分類號作為主軸,可以大幅降低在進行專利趨勢分析時對於人力技術背景的要求。
For patent strategy, patent analysis is a very important pre-investigation. Based on the analysis to the trend of a specific field, the enterprise can examine the novelty of an invention to be applied for patent; the patent drafter can weigh the inventive steps of the application. The development of each product costs a lot to every enterprise, and therefore it is nature to seek patent protection. The most important, once the product of an enterprise involved in litigation, it is a serious damage to the enterprise regarding the enterprise image and operation. Thus pre-investigating to the circumstance of the field related to the product being marketed is necessary.
In Taiwan electronics industry, patent litigation takes place all the time currently. That news highlights that the Taiwan enterprises neglect the aspect of patent in advance. However electronics industry varies circumstance every 3 month and most enterprises hold numerous patents. The necessity is doubtable to spend tremendous time and human resource to construct a patent map.
The trend analysis of patent provides the preliminary information and facilitates the decision of whether it is necessary to construct a patent map. Combining the technology and market information, the trend analysis even can disclose the technical development profile and the tendency of competitors to provide the direction of research and marketing for enterprises.
This study uses the metal oxide resistive random-access-memory as example and provides the investigation method suitable for electronics industry. It is convenient to estimate the patent tendency and the influence of a patent itself. This analysis method takes the point of view of industry chain. The result of this method is validated through comparing with the properties of the patents selected by citation. In the aspect of methodology, this study provides an analysis process for electronics patent tendency. Its characters are fast, simple and step-defined. More important, the analysis is based on patent classification number. That could dramatically decrease the technology requirement of human resource when proceeding to the patent tendency analysis.
摘要I
ABSTRACTII
致謝III
章節目錄IV
表目錄IX
圖目錄XI
第1章 緒論1
1.1 研究背景1
1.2 研究動機2
1.3 研究目的4
1.4 研究範圍5
第2章 技術探討7
2.1 RRAM背景7
2.1.1 RRAM歷史7
2.1.2 記憶體分類9
2.1.3 RRAM結構12
2.1.4 RRAM操作特性13
2.2 金屬氧化物型電阻式記憶體製程16
2.2.1 製程概述16
2.2.2 電容之標準CMOS製程17
2.2.3 MIM結構標準CMOS製程18
2.2.4 金屬氧化物型電阻式記憶體陣列結構19
2.2.5 小結20
2.3 未來挑戰21
第3章 市場現況23
3.1 DRAM產業分析24
3.2 NAND FLASH 逐漸取代DRAM26
3.3 快閃記憶體與DRAM市場變化趨勢29
3.4 次世代記憶體: RRAM33
第4章 分析研究方法36
4.1 專利權與專利說明書簡介36
4.1.1 專利權36
4.1.2 專利說明書36
4.2 專利資料檢索資料庫37
4.3 專利檢索流程39
4.3.1 決定分析母體39
4.3.2 細部分析41
4.3.3 分析產業之專利分類號42
4.3.4 決定具影響力的專利44
4.3.5 小結44
4.4 專利分析工具46
第5章 實證分析47
5.1 檢索結果47
5.1.1 決定分析母體47
5.1.2 專利細部分析48
5.1.3 分析產業之專利分類號49
5.1.4 決定具影響力專利51
5.2 分析母體概觀51
5.2.1 分析母體專利數分析52
5.2.2 分析母體申請人國別分析55
5.2.3 分析母體IPC趨勢58
5.2.4 分析母體IPC歷年趨勢59
5.2.5 分析母體公司研發強度61
5.3 細部分析63
5.3.1 細部分析專利數分析63
5.3.2 細部分析申請人國別分析64
5.3.3 細部分析IPC趨勢66
5.3.4 細部分析IPC歷年分析68
5.3.5 細部分析公司研發強度69
5.3.6 細部分析發明人分析72
5.4 引證分析72
5.5 產業鏈分析75
5.5.1 RAM IC設計(Design)78
5.5.2 EDA設計服務79
5.5.3 SIP供應商79
5.5.4 晶圓製造(Fab)80
5.5.5 封裝技術(Packing)81
5.5.6 記憶體模組技術(Module)81
5.6 決定優勢IPC82
5.6.1 由優勢IPC決定具有影響力專利83
5.7 比較具影響力專利與高引證專利85
第6章 結論與探討88
6.1 研究分析88
6.1.1 檢索策略分析88
6.1.2 跨產業環節專利檢索的特色89
6.2 結論89
參考文獻91
A. 英文參考文獻
A-1. 期刊、論文及研討會
Akinaga, H. and H. Shima, Resistive Random Access Memory (ReRAM) Based on Metal
Oxides. Proceedings of the IEEE. 98(12): p. 2237-2251.
Baek, I.G., et al. Highly scalable nonvolatile resistive memory using simple binary oxide
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ChiaHua, H., et al. Threshold Vacuum Switch (TVS) on 3D-stackable and 4F2 cross-point
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Chien, W.C., et al. A forming-free WOx resistive memory using a novel self-aligned field
enhancement feature with excellent reliability and scalability. in Electron Devices Meeting (IEDM), 2010 IEEE International.
Chua, L.O., Memristor-The missing circuit element. Circuit Theory, IEEE Transactions on,
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Flocke, A., et al. A Fundamental Analysis of Nano-Crossbars with Non-Linear Switching
Materials and its Impact on TiO2 as a Resistive Layer. in Nanotechnology, 2008. NANO '08. 8th IEEE Conference on. 2008.
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high current densities. Applied Physics Letters, 2005. 87(13): p. 133502-133502-3.
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Circuits Society Newsletter, IEEE, 2008. 13(1): p. 42-44.
Jaeyun, Y., et al. Highly reliable and fast nonvolatile hybrid switching ReRAM memory
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Kim, M.J., et al. Low power operating bipolar TMO ReRAM for sub 10 nm era. in
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Lee, M.-J., et al., A fast, high-endurance and scalable non-volatile memory device made
from asymmetric Ta2O5?/TaO2? bilayer structures. Nat Mater. 10(8): p. 625-630.
Lewis, D.L. and H.H.S. Lee. Architectural evaluation of 3D stacked RRAM caches. in 3D
System Integration, 2009. 3DIC 2009. IEEE International Conference on. 2009.
Makarov, A., V. Sverdlov, and S. Selberherr. New trends in microelectronics: Towards an
ultimate memory concept. in Devices, Circuits and Systems (ICCDCS), 2012 8th International Caribbean Conference on.
Mutsuko, H. and D. Redinger. Session 4: Displays, sensors, and MEMS --thin-film
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Shyh-Shyuan, S., et al. A 4Mb embedded SLC resistive-RAM macro with 7.2ns read-write
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Terai, M., et al. Effect of bottom electrode of ReRAM with Ta2O5/TiO2 stack on RTN
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Thakar, G.V., et al. High performance 0.3 /spl mu/m CMOS using I-line lithography and
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Tsunoda, K., et al. Low Power and High Speed Switching of Ti-doped NiO ReRAM under
the Unipolar Voltage Source of less than 3 V. in Electron Devices Meeting, 2007. IEDM 2007. IEEE International. 2007.
Wei, Z., et al. Highly reliable TaOx ReRAM and direct evidence of redox reaction
mechanism. in Electron Devices Meeting, 2008. IEDM 2008. IEEE International. 2008.
Yu-Chih, H., L. Huan-Min, and C. Huang-Chung. Superior resistive switching
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Zhuang, W.W., et al. Novel colossal magnetoresistive thin film nonvolatile resistance
random access memory (RRAM). in Electron Devices Meeting, 2002. IEDM '02. International. 2002.

A-2. 網頁參考資料
Elpida, Sharp Team Up on Resistive RAM - A Full Blown Memory Initiative?
(http://www.brightsideofnews.com/news/2010/10/17/elpida2c-sharp-team-up-on-resistive-ram---a-full-blown-memory-initiative.aspx)
Fighting words: Apple's 'Post-PC' and Microsoft's 'PC Plus' were never that different
(http://www.theverge.com/apple/2012/7/12/3151491/fighting-words-apple-post-pc-microsoft-pc-plus)
Nanoelectronic Memristor/RRAM Devices for High Density Logic and Memory
Applications (www.eng.utoledo.edu/eecs/faculty_web/~rjha/research_projectsNew.html)
Panasonic AM microcomputer series provides high-performance embedded
controllers optimized for applications, mainly in sensor, power, and automotive fields.
(http://www.semicon.panasonic.co.jp/en/products/microcomputers/)
Resistance-switching memory
(http://cmsl.snu.ac.kr/?mid=ReRAM2)

Samsung Develops Memory Cell for Large-capacity 3D ReRAM
(http://techon.nikkeibp.co.jp/english/NEWS_EN/20121213/256171/)

B. 中文參考文獻
B-1. 書籍
拓墣產業研究所(民96)。韓國次世代非揮發性記憶體發展現況與策略。台北市:拓墣科技
拓墣產業研究所(民99)。全球記憶體元件應用市場與趨勢分析。台北市:拓墣科技。
陳達仁(民98)。專利資訊檢索、分析與策略。台北市:華泰文化。
曾智超(民101)。台灣DRAM產業的未來走向。台北市:財團法人國家政策研究基金會。
B-2. 論文
何威霆, 釩摻雜鋯酸鍶基記憶體元件之電阻轉換特性, 電機工程學系. 2009,
國立東華大學: 花蓮縣. p. 99.
李明道, (鎳、鈦與鎢)氧化物之電性及應用於電阻式隨機記憶體研究,
材料科學與工程學系, 國立交通大學: 新竹市. p. 115.
許欽雄, 雙圖案微影技術之晶片設計方法, in 電子工程學研究所,
臺灣大學: 台北市. p. 149.
連志銘, 以熱氧化法製備氧化銅薄膜及探討微結構與光學性質,
化學工程系碩士班. 2008, 國立高雄應用科技大學: 高雄市. p. 76.
陳建熹, 二氧化鉿─二氧化鈦複合薄膜於非揮發性電阻式記憶體之特性研究,
材料科學工程學系. 2009, 國立清華大學: 新竹市. p. 70.
黃薰瑩, 熱處理及下電極材料對五氧化二鉭電容器之特性影響,
材料科學及工程學系碩博士班. 2002, 國立成功大學: 台南市. p. 107.

B-3. 網頁
2012年NAND型快閃記憶體將超越DRAM產值
(http://cdnet.stpi.narl.org.tw/techroom/market/eeic/2012/eeic_12_012.htm)
9奈米超節能記憶體技術發表會
(http://www.ndl.org.tw/web/news/9nmNews.php)
TrendForce:供貨緊縮與備貨需求,八月上旬NAND Flash合約價持續走穩
(http://press.trendforce.com/tw/node/4367)
全球記憶體產品市場發展現況與預測
(http://edm.itri.org.tw/enews/epaper/10012/d01.htm)
松下計劃2012年量產ReRAM,將首先配備於MCU(Microcontroller unit)
(http://www.moneydj.com/kmdj/bookmark/bookmarkviewer.aspx?keyid=dac37df9-243e-4a9c-a96f-3a1d0a92e72e)
茂德科技重整期間相關公告
(http://promosst.promos.com.tw/AP/BBS/Regorg.NSF/0/1AEC9BC017902BCA48257A8B0026A890)
憶阻器技術準備邁向商業化
(http://www.eettaiwan.com/ART_8800618753_628626_NT_53d11df2.HTM)
全文檔公開日期:2018/07/29 (本校及區域網路)
全文檔公開日期:不公開 (校外網際網路)
全文檔公開日期:不公開 (國家圖書館)
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